Storage Controller Descriptor Queue for Faster Read Data Output
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Solution Overview
Problem
Existing storage devices face inefficiencies in data output and read operations due to varying times at which memory devices provide read data, leading to delays in completing read operations without waiting for all data to be stored in a buffer memory.
Innovation Solution
A storage device with a controller that includes a buffer memory and a descriptor queue, allowing for efficient data output by performing read operations based on a linked list structure, status check operations, and updating descriptors to ensure timely data transfer to an external device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the controller waits for all read data to be stored in the buffer memory before performing the next read operation, then data completeness is ensured, but read operation efficiency deteriorates
Solution Approach 1:
The controller performs status check operations to determine in advance whether read data has been completely stored in the buffer memory before initiating the next read operation. This preliminary checking allows the system to proceed with subsequent read operations as soon as data is available, rather than waiting for all data to be stored, thereby improving read operation efficiency while maintaining data completeness through the descriptor queue mechanism that tracks the status of each read operation independently
2Productivity
If the controller performs read operations for multiple memory devices simultaneously, then overall data throughput is improved, but timing synchronization becomes more complex
Solution Approach 1:
The controller divides read operations into separate descriptor entries for each memory device, allowing independent tracking and management of each read operation's timing and status. Each descriptor contains device-specific information including timing parameters, enabling the controller to handle multiple simultaneous read operations with different timing requirements without creating a complex centralized synchronization mechanism
Solution Approach 2:
The controller dynamically adjusts the timing of read operations based on the specific characteristics of each memory device and the current system state. The descriptor queue allows read operations to be scheduled and executed at optimal times for each device, with the controller adapting to varying data availability and buffer status rather than using fixed timing patterns
3Reliability
If the controller checks the status of all read data before output, then data readiness is ensured, but output delay increases
Solution Approach 1:
The controller performs partial status checks on read data, determining whether data is ready for output based on buffer status information without waiting for complete verification of all data. The descriptor queue mechanism allows the controller to proceed with outputting data that is sufficiently ready, accepting a small risk of premature output in exchange for significantly reduced output delays
Data Source
AI summary
The present technology relates to an electronic device. According to the present technology, a storage device includes a plurality of nonvolatile memory devices, a buffer memory configured to temporarily store data provided by the memory devices, and a controller including a descriptor queue storing a plurality of descriptors, wherein the controller controls the memory devices to perform a read operation corresponding to a first descriptor among the plurality of descriptors, performs a first status check operation of checking whether read data read through the read operation is stored in the buffer memory, and determines, based on a result of the first status check operation, read data to be output to an external device from among the read data read through the read operation.