Storage Controller Reset Read for 3D NAND Vt Disturb

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Solution Overview

Problem

Nonvolatile memory devices, particularly 3D NAND devices, suffer from hot electron read disturb due to stable Vt states during read operations, leading to increased errors and uncorrectable data changes, which existing hardware solutions fail to effectively mitigate without increasing cost and control circuitry complexity.

Innovation Solution

A storage controller manages the transition of nonvolatile memory devices from a stable Vt state to a transient Vt state before servicing read requests by performing dummy or reset reads, reducing the risk of hot electron read disturb through firmware-controlled operations that adapt to different media and processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If hardware solutions are used to mitigate stable Vt read disturb, then read disturb degradation is reduced, but device cost and control circuitry footprint increase

Engineering Contradiction:
Improveread disturb degradationVSAvoidcontrol circuitry footprint
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent replaces hardware-based mitigation mechanisms with a firmware/software-based solution. The storage controller uses firmware to detect stable Vt states and initiate reset read operations, eliminating the need for dedicated hardware circuitry while achieving the same reliability improvement against read disturb degradation

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the operational parameters of the storage system by introducing a state-detection mechanism that monitors Vt stability and dynamically adjusts read operations accordingly. By detecting stable Vt states and triggering reset reads, the system adapts its behavior to prevent read disturb without requiring permanent hardware modifications

Inventive Principle:
Principle #35Parameter changes

2Reliability

If reset read operations are performed to transition from stable Vt state, then hot electron read disturb is reduced, but read access time increases

Engineering Contradiction:
Improvehot electron read disturbVSAvoidread access time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs reset read operations as a preliminary action before actual data reads when stable Vt state is detected. This preliminary transition prepares the storage media by eliminating hot electron conditions, ensuring that subsequent read operations occur under optimal conditions with minimal disturb effects

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements a feedback mechanism where the storage controller monitors storage media state, detects stable Vt conditions, and dynamically adjusts read operations accordingly. This closed-loop approach ensures reset reads are performed only when necessary, minimizing time overhead while maintaining reliability

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11302405B2System approach to reduce stable threshold voltage (Vt) read disturb degradation
Publication Date: 2022.04.12 INTEL NDTM US LLC
  • US11302405B2 patent drawing
  • US11302405B2 patent drawing
  • US11302405B2 patent drawing

AI summary

A nonvolatile (NV) memory device includes an NV storage media and a storage controller to control access to the NV storage media. In response to a host read request, the storage controller can determine if the NV storage media is in a stable Vt (threshold voltage) state. If the NV storage media is in a stable Vt state, the storage controller can perform a reset read operation prior to servicing the host read request. A reset read is a read operation that does not produce data to send back to the host. The reset read operation is a dummy read that puts the NV storage media into a transient Vt state, which has lower risk of read disturb.