Storage Controller Submission Queue Fetch Error Recovery
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Solution Overview
Problem
NVMe systems face issues with submission queue fetching errors, leading to unreliable command identifiers and potential blue screen failures due to PCIe packet errors, which existing solutions address with high latency and complexity.
Innovation Solution
A storage controller is configured to determine a submission queue fetch error and derive a command identifier using a command identifier allocation model, allowing it to post a completion message with a unique submission queue identifier and command identifier, even in the absence of accurate command data, thereby enabling robust error recovery with low latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the storage controller retries fetching the command from the submission queue, then the reliability of command identification improves, but the latency increases significantly
Solution Approach 1:
The host pre-generates and stores expected command identifiers in a mapping structure before submission queue fetch errors occur. When an error happens, the storage controller immediately uses this pre-computed mapping to recover the command identifier without retrying the fetch operation, thus eliminating retry latency while maintaining reliable command identification.
2Reliability
If the storage controller implements a complex error recovery mechanism with multiple retry attempts, then the reliability of command processing improves, but the device complexity increases
Solution Approach 1:
Instead of implementing complex retry logic and state machine-based error recovery in the storage controller, the host creates a simplified copy of the command identifier information in a mapping structure. This copying approach transfers the error recovery complexity to the host side, allowing the storage controller to use a simple lookup operation that maintains reliability without increasing controller complexity.
3Productivity
If the storage controller posts an error completion without accurate command data, then the productivity improves by avoiding pipeline breaks, but the measurement precision of command status deteriorates
Solution Approach 1:
A completion mapping structure acts as an intermediary between the submission queue and the completion queue. When a fetch error occurs, the storage controller uses this mapping to post an error completion with a recovered command identifier, allowing the completion pipeline to continue flowing without breaks while maintaining accurate command status information through the mapping's pre-stored data.
Data Source
AI summary
An apparatus includes a non-volatile memory media and a storage controller. The storage controller is configured to fetch a storage command from a submission queue of a host. The submission queue has a submission queue identifier (SQID). The storage controller then determines a submission queue fetch error in response to receiving a Transport Layer Packet (TLP) error as a result of fetching the storage command. Next, the storage controller is configured to determine a command identifier (CID) for the storage command associated with the submission queue fetch error. The storage controller then sends a completion message to the host. The completion message uniquely identifies the storage command of the submission queue associated with the submission queue fetch error using the SQID and CID.