Storage Device Controller with Low-Leakage and High-Mobility Transistors

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Solution Overview

Problem

Existing storage devices face challenges in achieving fast writing while ensuring long-term data retention due to issues such as high leakage currents and slow writing/erasing processes in volatile and non-volatile memory devices.

Innovation Solution

A storage device design incorporating a controller with a first transistor having low leakage current and a second transistor with high mobility, controlled by a control switch component, allowing for fast writing during active stages and long-term storage during inactive stages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Duration of action of stationary object

If non-volatile memory devices use floating gate to retain charge for long-term storage, then data retention is improved, but writing speed deteriorates due to high voltage requirements and long writing time

Engineering Contradiction:
Improvedata retention timeVSAvoidwriting speed
Core Design Contradiction:
Duration of action of stationary objectVSSpeed

Solution Approach 1:

The controller is divided into two independent transistor units: a first transistor unit for writing operations and a second transistor unit for data retention. This segmentation allows each unit to be optimized for its specific function without compromising the other, resolving the contradiction between fast writing and long-term retention.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first transistor is designed with low leakage current characteristics for data retention, while the second transistor is designed with high mobility characteristics for fast writing operations. This local quality differentiation allows each transistor to excel at its designated function, achieving both fast writing and long-term retention simultaneously.

Inventive Principle:
Principle #3Local quality

2Speed

If volatile memory devices use dynamic storage with capacitors, then writing speed is improved, but data retention deteriorates as data is lost when power is lost

Engineering Contradiction:
Improvewriting speedVSAvoiddata retention time
Core Design Contradiction:
SpeedVSDuration of action of stationary object

Solution Approach 1:

The memory device is segmented into two functional parts: a volatile memory unit for fast writing operations and a non-volatile memory unit for long-term data retention. This segmentation allows the system to leverage the advantages of both volatile and non-volatile memory without their respective disadvantages.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent merges volatile and non-volatile memory technologies into a single hybrid storage device. The volatile memory provides fast writing capability while the non-volatile memory ensures long-term retention, combining the best features of both memory types to resolve the contradiction between speed and retention.

Inventive Principle:
Principle #5Merging (Combining)

3Speed

If transistors operate with high mobility for fast writing, then writing speed is improved, but leakage current increases causing data retention to deteriorate

Engineering Contradiction:
Improvewriting speedVSAvoidleakage current
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

The transistor population is segmented into two distinct groups: first transistors optimized for low leakage current and second transistors optimized for high mobility. This segmentation prevents the trade-off between speed and energy loss by assigning different functional requirements to different transistor groups.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different transistors within the controller are given different local qualities: some transistors have low leakage current characteristics for retention-critical operations, while others have high mobility characteristics for speed-critical writing operations. This local quality differentiation eliminates the need to compromise between speed and energy efficiency.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12462854B2Storage device and display
Publication Date: 2025.11.04 SHENZHEN CHINA STAR OPTOELECTRONICS SEMICON DISPLAY TECH CO LTD
  • US12462854B2 patent drawing
  • US12462854B2 patent drawing
  • US12462854B2 patent drawing

AI summary

A storage device includes a signal input terminal, a signal output terminal, a latch, and a controller. The latch is connected between the signal input terminal and the signal output terminal, and the latch is configured to write and store data. The controller is connected between the signal input terminal and the latch. The controller includes a first transistor, a second transistor, and a control switch component, the first transistor and the second transistor are electrically connected to the latch, the control switch component is electrically connected to the first transistor and the second transistor to control the first transistor and the second transistor to be turned on or off. A leakage current of the first transistor is less than a leakage current of the second transistor, and a mobility of the second transistor is greater than a mobility of the first transistor.