Storage System Data Transfer Control Management Unit Latency Optimization

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Solution Overview

Problem

Storage systems face challenges in achieving high I/O performance with limited hardware resources, particularly in middle-range and entry-class systems, due to increased latency in DMA-involved processes and the need for redundant data transfer to hide latency, which is not effectively addressed by general-purpose protocol chips.

Innovation Solution

A storage system configuration that includes first and second temporary data storage units, each with a dedicated data transfer controller, and a data transfer control management unit to manage data transfer processes, allowing for efficient data processing and transfer between storage devices and cache memory, thereby optimizing I/O performance even with limited resources.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If DMA is used for data transfer in storage systems, then data transfer efficiency is improved, but process latency increases

Engineering Contradiction:
Improvedata transfer efficiencyVSAvoidprocess latency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The system performs preliminary actions by pre-fetching data from storage devices to the cache memory before actual I/O requests are processed. The data transfer control management unit anticipates data needs and initiates transfer operations in advance, so that when I/O requests arrive, the data is already available in the cache, thereby hiding the latency associated with DMA operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces a data transfer control management unit as an intermediary between the DMA controller and the I/O processing system. This intermediary manages and coordinates DMA transfer operations, optimizing the timing and sequencing of data transfers to minimize latency impact while maintaining high transfer efficiency.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If redundant data transfer is performed to hide latency, then I/O performance is improved, but hardware resource requirements increase

Engineering Contradiction:
ImproveI/O performanceVSAvoidhardware resource requirements
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The data transfer control management unit serves multiple functions: it manages DMA transfers, coordinates data movement between storage devices and cache memory, and optimizes transfer timing. This multi-functional approach eliminates the need for separate dedicated hardware components for each function, achieving high I/O performance without proportionally increasing hardware resource requirements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system implements self-service mechanisms where the data transfer control management unit automatically monitors cache memory status, identifies available space for pre-fetching, and initiates data transfers without external intervention. This autonomous operation enables redundant data transfer for latency hiding while minimizing the overhead of control hardware.

Inventive Principle:
Principle #25Self-service

3Device complexity

If general-purpose protocol chips are used for data transfer, then device complexity is reduced, but specialized data transfer functions cannot be provided

Engineering Contradiction:
Improveprotocol chip simplicityVSAvoidspecialized data transfer functions
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The data transfer control management unit acts as an intermediary layer between general-purpose protocol chips and specialized data transfer requirements. It implements sophisticated DMA coordination, latency hiding strategies, and cache management algorithms in software or firmware, allowing simple protocol chips to achieve complex data transfer functionality without increasing hardware complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces specialized hardware mechanisms with software-based control logic in the data transfer control management unit. Functions that could be implemented with complex dedicated hardware (such as intelligent data prefetching, latency management, and coordinated multi-device transfers) are instead implemented through software algorithms, maintaining protocol chip simplicity while providing adaptable specialized functions.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS9304710B2Storage system and data transfer method of storage system
Publication Date: 2016.04.05 HITACHI VANTARA LTD
  • US9304710B2 patent drawing
  • US9304710B2 patent drawing
  • US9304710B2 patent drawing

AI summary

A storage system is described and includes a storage apparatus for storing data used by an external apparatus, first and second temporary data storage units, a host interface, a disk interface, and first and second controllers. The first controller is configured to select as a data transfer process, when the host interface receives a command from the external apparatus, one of a first data transfer process and a second data transfer process based on the command. The first data transfer process is a data transfer from the first temporary data storage unit to the external apparatus by the host interface. The second data transfer process is a data transfer from the first temporary data storage unit to the second temporary data storage unit by the second controller, and a data transfer from the second temporary data storage unit to the external apparatus by the host interface.