Storage Defect Scanning With Error Ratio and LDPC Margining
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Solution Overview
Problem
Designing manufacturing tests for storage devices using low-density parity-check (LDPC) codes is challenging due to unpredictable defect impacts and the lack of a bounded distance decoding algorithm, making it difficult to determine if a sector is close to failure and whether reserved margins are sufficient to handle growing defects.
Innovation Solution
Implementing a defect test using an error ratio (ER) calculation and a moving window approach to detect defects, where the error ratio is computed as the number of error bits to the number of error symbols, and thresholds are set to determine defect presence, alongside using reduced LDPC iterations for testing to ensure margining.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional defect testing methods are used for LDPC codes, then testing can be performed, but the testing accuracy is insufficient due to unpredictable defect impacts and lack of bounded distance decoding algorithm
Solution Approach 1:
The patent changes the testing parameter from traditional error counting to error ratio calculation (error bits divided by error symbols). This parameter transformation enables meaningful defect detection despite the unpredictable nature of LDPC decoding, as the ratio provides a normalized metric that accounts for varying defect impacts across different sectors.
Solution Approach 2:
The patent introduces an intermediary metric (error ratio) that mediates between the raw error data and the defect detection decision. This intermediary allows the system to handle the unpredictability of LDPC decoding by using a derived metric that correlates with defect severity without requiring bounded distance decoding capabilities.
2Reliability
If all sectors are tested with full LDPC iterations, then comprehensive defect detection is achieved, but testing time and computational resources are excessive
Solution Approach 1:
The patent applies partial action by using reduced LDPC iterations for the initial defect scan testing. This allows the system to perform comprehensive enough testing to detect severe defects while avoiding the excessive time and computational resources required for full iterations on all sectors. The error ratio metric compensates for the reduced iteration count.
Solution Approach 2:
The patent segments the testing process into different phases: an initial defect scan using reduced iterations and error ratio analysis, followed by more comprehensive testing only for sectors that require further evaluation. This segmentation enables efficient resource allocation while maintaining detection comprehensiveness where needed.
3Reliability
If sectors with minor defects are masked out, then storage capacity is reduced, but device reliability is improved
Solution Approach 1:
The patent applies local quality by using different evaluation criteria for different sectors based on their error ratio characteristics. Sectors with high error ratios (indicating severe defects) are masked out, while sectors with low error ratios are retained and used for storage. This localized quality assessment optimizes the balance between reliability and capacity by making sector-specific decisions rather than blanket masking.
Data Source
AI summary
A method for detecting a defect in a portion of a storage device is disclosed. Reference data and data read from the portion are compared to determine a number of error bits and a number of error symbols. An error ratio is computed, wherein the error ratio comprises a ratio of the number of error bits to the number of error symbols. A defect is detected based on whether the error ratio exceeds a threshold. In some embodiments, the reference data and the read data are compared to determine an error vector, wherein a bit in the error vector with a value one indicates a bit error in the read data. For each of a plurality of windows of the error vector, a corresponding number of error bits is determined. A defect is detected based on whether any of the numbers of error bits exceeds a threshold.