Storage Delay Signaling After Long Power-Off Intervals

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Non-volatile memory devices experience performance reductions and failures due to sharp changes in physical environment caused by prolonged power-off events, leading to reduced data reliability and delays in memory operations.

Innovation Solution

A storage device generates a dummy delay signal based on power detection to manage memory operations, delaying them when prolonged power-off events are detected to minimize performance reductions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If memory operations are performed immediately after power-on, then operational speed is improved, but data reliability deteriorates due to sharp physical environment changes from prolonged power-off events

Engineering Contradiction:
Improveoperational speedVSAvoiddata reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The power detection circuit detects power-off events and generates a delay signal before memory operations are initiated. This preliminary detection and delay mechanism prepares the system in advance to avoid sharp physical environment changes, ensuring data reliability is maintained while still enabling operations after the delay period.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If a delay mechanism is introduced to mitigate physical environment changes, then data reliability is improved, but operational speed deteriorates due to delayed memory operations

Engineering Contradiction:
Improvedata reliabilityVSAvoidoperational speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The delay mechanism is dynamically controlled based on the detected power-off duration. The delay signal is generated only when the power-off time exceeds a reference threshold, making the delay dynamic rather than fixed. This allows the system to adaptively balance reliability improvement with operational speed by applying delays only when necessary.

Inventive Principle:
Principle #15Dynamics

3Reliability

If power-off duration monitoring is implemented, then performance reduction is minimized, but device complexity increases due to additional detection circuits

Engineering Contradiction:
Improveperformance stabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A power detection circuit is introduced as an intermediary component between the power supply and the memory device. This intermediary monitors power-off events and generates delay signals to prevent sharp physical environment changes, thereby maintaining performance stability without requiring complex modifications to the core memory architecture.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12573437B2Storage device for generating a delay signal, and a method of operating the same
Publication Date: 2026.03.10 SAMSUNG ELECTRONICS CO LTD
  • US12573437B2 patent drawing
  • US12573437B2 patent drawing
  • US12573437B2 patent drawing

AI summary

A method of operating a storage device which communicates with a host device, the method including: detecting a first power signal provided from the host device; determining whether a time interval between the detection of the first power signal and a most recent shutoff of the first power signal exceeds a reference time interval; generating a dummy delay signal in response to determining that the time interval exceeds the reference time interval; and managing a first subsequent memory operation based on the dummy delay signal.