Storage Device Adaptive Reliability Check via Machine Learning
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Solution Overview
Problem
The high degree of integration in semiconductor storage devices leads to scaling issues, resulting in potential data damage and reduced reliability, necessitating an efficient reliability check mechanism.
Innovation Solution
A storage device that combines an actual check and a machine learning-based check to verify the reliability of memory cells, where the machine learning-based check determines expected errors using sample read operations and device information, and the actual check confirms errors through error correction decoding, allowing for adaptive adjustment of check targets based on error thresholds.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a high degree of integration is implemented in the storage device, then manufacturing cost is reduced, but reliability of data storage deteriorates due to scaling issues and structural changes
Solution Approach 1:
The patent performs reliability checks on memory blocks before they are fully utilized. The controller identifies candidate memory blocks and conducts preliminary read operations to detect potential errors early, preventing data storage issues before they occur. This proactive approach addresses the reliability deterioration caused by high integration scaling.
Solution Approach 2:
The patent implements a feedback mechanism where the controller continuously monitors memory block reliability through read operations and error correction decoding. When errors are detected, the system adjusts its behavior by marking affected blocks as unusable and selecting alternative blocks, creating a closed-loop system that adapts to degradation from high integration.
2Reliability
If a comprehensive reliability check is performed on all memory blocks, then data storage reliability is improved, but check time increases significantly
Solution Approach 1:
The patent performs reliability checks on only a subset of memory blocks identified as candidates rather than all memory blocks. The controller selectively applies read operations and error correction decoding to specific blocks based on usage patterns and risk assessment, achieving adequate reliability verification without the time cost of comprehensive checking.
Solution Approach 2:
The patent divides the memory device into multiple blocks and processes them independently. The controller can identify and check candidate blocks separately from non-candidate blocks, allowing parallel processing and reducing overall check time. This segmentation enables the system to focus computational resources on high-risk areas.
3Measurement precision
If error correction decoding is performed on all read operations, then data accuracy is improved, but processing speed deteriorates
Solution Approach 1:
The patent applies error correction decoding only to read operations on candidate memory blocks that require reliability verification, rather than all read operations. For non-candidate blocks with established reliability, the system skips the decoding step, maintaining data accuracy where needed while preserving processing speed for routine operations.
Data Source
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AI summary
Described is a storage device which includes a nonvolatile memory device including a plurality of memory blocks, each including a plurality of memory cells connected to a plurality of word lines, and a controller configured to perform a first read operation on memory cells connected to a selected word line included in a selected memory block based on a request of an external host device. The controller is further configured to perform a check read operation that checks a reliability of the memory cells of the selected memory block after performing the first read operation. In the check read operation, the controller is further configured to select and perform one of an actual check and a machine learning-based check.