Semiconductor Storage Device Adaptive Performance Throttling

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Solution Overview

Problem

Semiconductor storage devices with non-volatile memory, such as NAND flash memory, have limited life expectancy due to endurance limits from program and erase cycles, making it challenging to ensure the longevity of devices under varying workloads, especially in server applications.

Innovation Solution

A semiconductor storage device with a controller that adapts performance levels based on workload history and future estimates, throttling operations to extend device life by adjusting performance levels according to calculated differences and reference values, ensuring the device operates within optimal parameters.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the processing performance of semiconductor storage devices is increased to meet high I/O demands, then productivity is improved, but the device life is shortened due to excessive PE cycles

Engineering Contradiction:
ImproveI/O performanceVSAvoiddevice life
Core Design Contradiction:
ProductivityVSDuration of action of stationary object

Solution Approach 1:

The patent implements dynamic performance throttling by continuously monitoring workload intensity and adjusting the processing speed of program and erase operations accordingly. When workload exceeds threshold levels, the controller dynamically reduces operation speed to keep PE cycles within endurance limits, thereby adapting device performance to varying workload conditions while preserving device life

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes operational parameters by adjusting processing speed based on workload intensity. The controller monitors PE cycle counts and modifies operation parameters (such as programming speed and erase speed) to maintain operations within safe endurance limits, transforming fixed-performance operations into variable-performance operations that preserve device longevity

Inventive Principle:
Principle #35Parameter changes

2Productivity

If workload intensity is increased to handle fluctuating server demands, then productivity is improved, but reliability deteriorates due to exceeding endurance limits

Engineering Contradiction:
Improveworkload handling capacityVSAvoiddata integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements a feedback mechanism where the controller continuously monitors workload intensity and PE cycle accumulation in real-time. Based on this feedback, the controller dynamically adjusts processing speed to prevent exceeding endurance limits. This closed-loop control ensures that reliability is maintained by preventing operational conditions that would lead to data integrity failures

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent applies beforehand cushioning by monitoring PE cycle counts and proactively reducing processing speed before endurance limits are exceeded. The controller maintains a safety margin by adjusting performance in advance when approaching critical thresholds, preventing reliability degradation before it occurs rather than reacting after damage happens

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS9223506B2Semiconductor storage device and method of throttling performance of the same
Publication Date: 2015.12.29 SAMSUNG ELECTRONICS CO LTD
  • US9223506B2 patent drawing
  • US9223506B2 patent drawing
  • US9223506B2 patent drawing

AI summary

A semiconductor storage device and a method of throttling performance of the same are provided. The semiconductor storage device includes a non-volatile memory device configured to store data in a non-volatile state; and a controller configured to control the non-volatile memory device. The controller calculates a new performance level, compares the calculated performance level with a predetermined reference, and determines the calculated performance level as an updated performance level according to the comparison result.