Storage Device Buffer Memory Segmentation for Parallel Programming

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Solution Overview

Problem

The reduced utilization of buffer memory in storage devices due to the reprogram method, which increases the time the buffer memory is occupied by program data, leading to reduced price competitiveness and inefficiency.

Innovation Solution

A storage device design that includes a first nonvolatile memory device and a second nonvolatile memory device of a different type, sharing a data line, where data is simultaneously provided to both devices, allowing initial programming to overlap and enabling efficient data transfer and reprogramming without prolonged buffer memory occupation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the reprogram method is used to store program data in buffer memory for initial programming and reprogramming, then data can be programmed into nonvolatile memory, but the buffer memory occupation time increases and utilization decreases

Engineering Contradiction:
Improvedata programming reliabilityVSAvoidbuffer memory utilization
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent divides the buffer memory into multiple regions (first buffer region, second buffer region, third buffer region) to simultaneously store different data (program data, read data, verify data). This segmentation allows parallel operations to occur without interfering with each other, enabling the buffer memory to be fully utilized throughout the programming process rather than being occupied by a single data set for the entire duration.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary actions by pre-loading verification data and read data into separate buffer regions before the actual programming operation begins. This preliminary preparation ensures that when programming occurs, all necessary data is already in place, allowing the buffer memory to be released sooner after programming completes, thus improving utilization.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If program data is stored in buffer memory until the end of initial programming and reprogramming, then complete data transfer can be ensured, but the time buffer memory is occupied increases

Engineering Contradiction:
Improvedata transfer completenessVSAvoidbuffer memory occupation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent enables continuous useful action by overlapping the programming operation with verification and read operations. While program data is being programmed into nonvolatile memory in the first buffer region, verification data is simultaneously verified in the second buffer region and read data is read in the third buffer region. This continuous parallel processing ensures data transfer completeness while minimizing the time any single data set occupies the buffer memory.

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

By segmenting the buffer memory into multiple functional regions, the patent allows different stages of the data transfer process to occur simultaneously in different regions, ensuring completeness of each stage while reducing the overall time the buffer memory is occupied by any single data set.

Inventive Principle:
Principle #1Segmentation

3Reliability

If the buffer memory is occupied by program data for an extended period, then reprogramming can be performed, but the price competitiveness of the storage device is reduced

Engineering Contradiction:
Improvereprogramming capabilityVSAvoidprice competitiveness
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent segments the buffer memory into multiple regions that can operate independently and simultaneously. This allows reprogramming operations to occur in one region while other regions are being used for verification or reading, thereby maintaining reprogramming capability while reducing the overall time buffer memory is occupied, which improves price competitiveness.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the operational parameters of the buffer memory by enabling parallel operations across multiple regions simultaneously. This parameter change from sequential to parallel operation reduces the total occupation time while maintaining all necessary reprogramming functions.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11055011B2Storage device
Publication Date: 2021.07.06 SAMSUNG ELECTRONICS CO LTD
  • US11055011B2 patent drawing
  • US11055011B2 patent drawing
  • US11055011B2 patent drawing

AI summary

A storage device includes a first nonvolatile memory device, a second nonvolatile memory device, and a data line. The second nonvolatile memory device is of a different type from the first nonvolatile memory device. The data line is shared by the first nonvolatile memory device and the second nonvolatile memory device. First data is simultaneously provided to the first nonvolatile memory device and the second nonvolatile memory device through the data line, the first data is written to the second nonvolatile memory device, and the first data is reprogrammed into the first nonvolatile memory device by reading the first data from the second nonvolatile memory device and providing the read first data to the first nonvolatile memory device.