Storage Device Data Consistency Verification for Inkjet Printers

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Solution Overview

Problem

The reliability of communication between a control unit and a storage device in inkjet printing systems is not adequately ensured, leading to potential errors due to defective electrical connections, which can result in data inconsistencies and storage device failures.

Innovation Solution

A storage device with a data receiving unit that checks the consistency of data received from a host circuit, transmitting a determination result only after data writing is complete, and using inverted data to verify communication integrity, thereby enhancing communication reliability between the host circuit and the storage device.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data is continuously written to the storage device without verification, then writing speed is improved, but communication reliability deteriorates due to potential errors from defective electrical connections

Engineering Contradiction:
Improvedata writing speedVSAvoidcommunication reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by performing data verification before completing the writing process. The host circuit sends verification data (inverted data or checksum) along with the original data, and the storage device verifies this data before finalizing the write operation. This preliminary verification prevents erroneous data updates while maintaining efficient data writing.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by having the storage device send back a determination result to the host circuit indicating whether the received data is consistent with the verification data. This feedback mechanism allows the host circuit to confirm successful and accurate data writing, improving communication reliability without significantly reducing writing speed.

Inventive Principle:
Principle #23Feedback

2Reliability

If data verification is performed continuously during writing, then communication reliability is improved, but writing speed deteriorates due to additional verification steps

Engineering Contradiction:
Improvecommunication reliabilityVSAvoiddata writing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies partial action by performing verification on a subset of the data (either inverted data or checksum values) rather than verifying every single bit of the original data. This partial verification approach provides sufficient error detection capability while minimizing the time overhead and maintaining high data writing speed.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If the storage device transmits determination results after every data reception, then communication reliability is improved, but data writing efficiency deteriorates due to frequent transmissions

Engineering Contradiction:
Improvecommunication reliabilityVSAvoiddata writing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent merges multiple determination results by batching several data reception events and transmitting a single consolidated determination result that covers multiple data items. This approach reduces the number of separate transmission operations while still providing reliable verification, thereby improving data writing efficiency without sacrificing communication reliability.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS8348377B2Storage device, board, liquid container, method of receiving data which are to be written in data storage unit from host circuit, and system including storage device which is electrically connectable to host circuit
Publication Date: 2013.01.08 CRYSTAL LEAP ZRT
  • US8348377B2 patent drawing
  • US8348377B2 patent drawing
  • US8348377B2 patent drawing

AI summary

A storage device electrically connected to a host circuit includes a data receiving unit, determination unit, and a data transmitting unit. The data receiving unit receives data including first data which are to be written in a memory array and second data which are generated based on the first data from the host circuit. The determination unit determines consistency between the first data and the second data. The data transmitting unit transmits a result of the determination to the host circuit.