Storage Device Controller Phase Bit Validation
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Solution Overview
Problem
The existing storage devices face challenges in improving communication speed between processors and storage devices, as the performance bottleneck shifts from storage device speed to communication speed between the processor and storage device, necessitating new devices and methods to enhance data processing and validation.
Innovation Solution
A storage device with a device controller that stores data in internal RAM, descrambles phase bits, and processes data only when they are valid, ensuring efficient data transmission and validation, thereby improving storage device speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the storage device processes all received data without validation, then data transmission speed is maintained, but processing efficiency deteriorates due to unnecessary processing of invalid data
Solution Approach 1:
The patent applies preliminary action by validating phase bits before processing the associated data. The device controller checks the validity of phase bits first, and only then proceeds to process the corresponding data. This preliminary validation prevents unnecessary processing of invalid data, improving overall processing efficiency while avoiding time waste on invalid operations.
2Manufacturing precision
If the device controller validates and descrambles phase bits before processing data, then processing accuracy is improved, but device complexity increases
Solution Approach 1:
The patent applies segmentation by separating the validation and processing functions into distinct operational stages. The device controller first validates phase bits independently, then based on the validation result, selectively processes only the valid data portions. This segmentation allows for improved validation accuracy while managing complexity by breaking down the processing into manageable, conditional steps.
Data Source
AI summary
A storage device includes nonvolatile memories and a device controller configured to store data being received from an external device in an internal RAM, according to a command and an address being received from the external device. The device controller controls the nonvolatile memories according to the data stored in the internal RAM, distinguishes whether phase bits received with the data and also stored in the internal RAM are valid, and processes the data stored in the internal RAM when the phase bits are valid.