Non-Volatile Storage Device Dual Interface Data Block Sizing

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Solution Overview

Problem

Existing non-volatile storage devices with multiple interfaces face challenges in efficiently writing data, particularly when handling stream data like moving images, due to differences in memory block sizes and interface protocols.

Innovation Solution

A memory system comprising a host device and a non-volatile storage device connected via multiple interfaces, where the non-volatile storage device includes a controller for writing data and a memory with distinct data blocks for each interface, allowing efficient data writing by matching the size of one data block to a natural number multiple or fraction of the other.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data is written to flash memory using traditional single-interface methods, then the writing process is simple, but the writing performance deteriorates when data size is smaller than memory block size and stream data recording speed cannot be guaranteed

Engineering Contradiction:
Improvewriting performanceVSAvoidinterface configuration
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent divides the memory system into multiple independent interfaces (SD bus interface and PCIe bus interface), each with its own data blocks and writing characteristics. This segmentation allows simultaneous operation of multiple writing paths, improving overall productivity while maintaining simplicity of individual interface operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The non-volatile storage device is designed to support multiple interfaces (SD bus and PCIe bus) with different data block sizes, making it universally compatible with various host devices and writing scenarios. This multi-functionality enables the system to adapt to different data sizes and speed requirements without sacrificing writing performance.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If a single data block size is used for both SD bus and PCIe bus interfaces, then the device structure is simple, but efficient writing cannot be achieved for both interfaces simultaneously

Engineering Contradiction:
Improvedata writing efficiencyVSAvoiddata block structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent assigns different data block sizes to different interfaces: first data blocks sized for SD bus operations and second data blocks sized for PCIe bus operations. This local quality optimization ensures that each interface operates at peak efficiency for its specific protocol requirements, with the controller intelligently routing data to appropriately-sized blocks.

Inventive Principle:
Principle #3Local quality

3Productivity

If data is written to memory blocks smaller than the management unit size, then small data access is efficient, but writing performance deteriorates due to underutilization of memory blocks

Engineering Contradiction:
Improvewriting performanceVSAvoiddata block utilization
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent implements dynamic data block selection where the controller adapts the data block size based on the interface being used and the characteristics of the data being written. This dynamic adjustment optimizes memory block utilization by matching block sizes to actual writing needs, preventing both underutilization and excessive wear.

Inventive Principle:
Principle #15Dynamics

4Reliability

If stream data is written to flash memory requiring real-time properties, then real-time recording is achieved, but minimum recording speed cannot be guaranteed due to flash memory characteristics

Engineering Contradiction:
Improvereal-time recording guaranteeVSAvoidrecording speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent establishes predetermined relationships between first data block sizes and second data block sizes (where first block size = n × second block size or 1/n × second block size). This preliminary structuring of data blocks enables the controller to pre-plan writing operations, ensuring that stream data can be written at guaranteed minimum speeds by selecting appropriate block sizes before writing begins.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250190343A1Host device, non-volatile storage device and memory system
Publication Date: 2025.06.12 PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO LTD
  • US20250190343A1 patent drawing
  • US20250190343A1 patent drawing
  • US20250190343A1 patent drawing

AI summary

A non-volatile storage device includes a controller that controls writing, and a memory, in which the memory is connected to a host device via a first interface and a second interface different from the first interface, and includes a first data block that is a management unit used at a time when data is written from the host device to the non-volatile storage device via the first interface, and a second data block that is a management unit used at a time when data is written to the non-volatile storage device via the second interface. The first data block has a size that is n times or 1/n times a size of the second data block, where n is a natural number.