Storage Device Interface Chip Adaptive Retraint
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Solution Overview
Problem
Existing storage devices face limitations in retraining non-volatile memory (NVM) due to temporal and regional constraints, which affect data integrity and alignment between data signals and clock signals, leading to potential bit errors and degradation in performance.
Innovation Solution
A storage device with an interface chip that determines whether retraining is necessary using an unselected internal channel and transmits a retraining request to the controller, allowing for adaptive retraining without temporal or regional limitations, utilizing a retraining checking circuit that includes a BIST circuit or oscillator to check alignment and adjust signal timings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If retraining operations are performed to compensate for signal degradation caused by frequency and temperature variations, then data integrity is improved, but temporal constraints limit the flexibility and efficiency of retraining operations
Solution Approach 1:
The interface chip performs preliminary determination of retraining necessity using an unselected internal channel before actual retraining operations. This allows the system to prepare and assess signal alignment requirements in advance, enabling more flexible scheduling of retraining operations without compromising data integrity
Solution Approach 2:
The interface chip acts as an intermediary between the controller and NVM devices, independently determining when retraining is necessary and transmitting retraining requests to the controller. This intermediary role decouples the retraining decision-making from the actual retraining execution, removing temporal constraints and allowing the controller to perform retraining at optimal times rather than being forced to interrupt operations immediately
2Reliability
If retraining operations are performed to align data signals with clock signals, then signal alignment is improved, but operational interruptions increase
Solution Approach 1:
The interface chip uses an unselected internal channel to preliminarily check signal alignment and determine retraining necessity before interrupting normal operations. This preliminary assessment allows the system to identify retraining needs without immediately halting data transfers, enabling smoother scheduling of retraining operations
Solution Approach 2:
The interface chip serves as an intermediary that independently monitors signal alignment conditions and manages retraining requests. By separating the alignment monitoring function from the retraining execution function, the system can maintain continuous data operations while the controller performs retraining at strategically chosen moments, minimizing operational interruptions
3Device complexity
If traditional retraining methods are used with temporal and regional constraints, then implementation complexity is reduced, but adaptability to different operating conditions deteriorates
Solution Approach 1:
The retraining functionality is segmented into two independent parts: (1) the interface chip that determines retraining necessity using unselected internal channels, and (2) the controller that executes retraining operations based on requests from the interface chip. This segmentation allows each component to specialize in its function, maintaining implementation simplicity while significantly improving adaptability to varying operating conditions
Solution Approach 2:
The interface chip acts as an intermediary layer between the physical interface and the controller, independently assessing signal conditions and managing retraining requests. This intermediary structure adds adaptability without substantially increasing overall system complexity, as the interface chip handles the complex monitoring and decision-making while the controller simply executes the requested retraining operations
Data Source
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Figure 3A
AI summary
A storage device includes NVM package and a controller connected to the NVM package through a channel and controlling operation of the NVM package. The NVM package includes an interface chip, first NVM devices connected to the interface chip through a first internal channel and second NVM devices connected to the interface chip through a second internal channel. The interface chip selects the first internal channel in response to an operation request received from the controller and connects the first internal channel to the channel. The interface chip also determines whether retraining is necessary in relation to the second internal channel and transmits a retraining request to the controller when retraining is necessary.