Storage Device Interface Circuit for SPI NAND Compatibility
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Solution Overview
Problem
Existing storage devices with nonvolatile semiconductor memory modules face challenges in reducing circuit size while accommodating multiple interface standards, such as SPI and NAND, which often require separate configurations and increased circuit complexity.
Innovation Solution
A storage device design that incorporates a serial interface circuit conforming to SPI and a NAND interface circuit on the same semiconductor substrate, with a host interface that allows selection between SPI and NAND interfaces, enabling conversion of SPI signals to NAND signals, thus allowing for a compact configuration that can adapt to different interface standards.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate interface circuits are provided for each interface standard (SPI, NAND, etc.), then compatibility with multiple interface standards is achieved, but device complexity and circuit size increase
Solution Approach 1:
The patent implements a universal interface circuit that can operate with multiple interface standards (SPI, NAND, etc.) by providing a single circuit capable of adapting to different protocols through configuration settings, rather than requiring separate dedicated circuits for each standard. This multi-functional approach reduces the overall number of circuits needed while maintaining compatibility with various interface types.
Solution Approach 2:
The interface circuit incorporates dynamic reconfiguration capabilities that allow it to switch between different interface standards based on operational requirements. The circuit can change its operational mode and protocol handling characteristics dynamically, enabling a single circuit to perform multiple functions that would traditionally require separate static circuits for each interface type.
2Adaptability or versatility
If separate interface circuits are provided for each interface standard, then support for multiple protocols is achieved, but the number of circuits and device size increase
Solution Approach 1:
The patent merges multiple interface circuit functions into a single integrated interface circuit that can handle both SPI and NAND protocols. By combining what would traditionally be separate circuits into one unified structure, the device footprint is reduced while maintaining support for multiple protocols through intelligent circuit design and shared functional blocks.
3Area of stationary object
If a single interface circuit is used for multiple standards, then device size is reduced, but interface compatibility may be compromised
Solution Approach 1:
The interface circuit incorporates intermediary functional blocks that act as translation layers between different interface protocols. These intermediary components enable the single circuit to properly handle and adapt signals from various interface standards (SPI, NAND, etc.) by mediating the protocol differences, thus maintaining full compatibility while using a reduced circuit footprint.
Data Source
AI summary
A storage device includes a nonvolatile semiconductor memory module, and a host interface for connection to a host that is external to the storage device. The host interface includes a first interface circuit conforming to Serial Peripheral Interface (SPI) and a second interface circuit conforming to an interface standard different from SPI. Output terminals of the first interface circuit are connected to input terminals of the second interface circuit, and output terminals of the second interface circuit are connected to input terminals of the nonvolatile semiconductor memory module.