Storage Device Logic Circuit Power Control
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Solution Overview
Problem
Conventional semiconductor storage devices face challenges in minimizing power consumption, leading to inefficient operation and increased energy usage.
Innovation Solution
The storage device incorporates a logic circuit that generates a signal to enable specific sub-circuits only when necessary, using a latch circuit and logical operations to manage input/output operations efficiently, thereby reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If sub-circuits are continuously enabled to ensure ready operation, then operational readiness is improved, but power consumption increases
Solution Approach 1:
The patent implements dynamic control of sub-circuit enablement based on operational state. The logic circuit monitors selection signals and dynamically enables only the necessary sub-circuits (first or second sub-circuit) based on the chip select signal state, rather than keeping all sub-circuits continuously enabled. This dynamic switching reduces power consumption while maintaining operational readiness when needed.
Solution Approach 2:
The patent employs periodic enabling of sub-circuits based on chip select signals. Instead of continuous operation, sub-circuits are enabled only during specific periods when selection signals are active, and disabled during non-selection periods. This periodic action pattern reduces average power consumption while ensuring circuits are ready when selected.
2Adaptability or versatility
If multiple sub-circuits are simultaneously enabled to handle various operations, then operational versatility is improved, but power consumption increases
Solution Approach 1:
The patent segments the input/output circuit into multiple independent sub-circuits (first sub-circuit and second sub-circuit), each capable of handling specific operations. The logic circuit selectively enables only the required sub-circuit based on the operation type and chip select signal, rather than enabling all sub-circuits simultaneously. This segmentation allows operational versatility while reducing power consumption by activating only necessary segments.
Solution Approach 2:
The patent applies local quality control by enabling specific sub-circuits based on local operation requirements. The logic circuit determines which sub-circuit (first or second) should be enabled based on the specific operation needed, providing different enablement states to different parts of the circuit. This ensures each sub-circuit operates with appropriate quality/state only when its specific function is required.
3Use of energy by moving object
If logic circuits continuously monitor selection signals to dynamically enable sub-circuits, then power consumption is reduced, but circuit complexity increases
Solution Approach 1:
The patent implements preliminary action by having the logic circuit evaluate selection signals and determine sub-circuit enablement states in advance, before actual data input or output operations begin. The logic circuit proactively enables the appropriate sub-circuit based on chip select signals, so that when data operations are initiated, the correct sub-circuit is already ready. This preliminary enablement reduces the need for complex real-time switching during operations.
Data Source
AI summary
A storage device includes a memory cell array, an input/output circuit, and a logic circuit. The input/output circuit including an input/output signal line through which data to be written into the memory cell array is received and data read from the memory cell array is transmitted. The logic circuit is configured to output a first signal to the input/output circuit. The first signal at an active level enables at least a part of the input/output circuit. The logic circuit includes a latch circuit configured to output a second signal at a level corresponding to a value of latched data. The logic circuit receives third, fourth, and fifth signals from an outside of the storage device via the input/output circuit. The logic circuit outputs a negative logical product of the third signal and a logical sum of at least the second, fourth, and fifth signals as the first signal.