Storage Device Map Scheduling via Host Memory Buffer
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Solution Overview
Problem
The high cost and size constraints of designing a small-sized, high-performance storage device with a high-capacity internal buffer make it difficult to include sufficient buffer capacity, leading to inefficiencies in map data handling and address translation.
Innovation Solution
A storage device configuration that utilizes a host memory buffer outside the storage device as a buffer, employing a controller to generate lists for address translation and leveraging nonvolatile memory for logical-to-physical address translation, reducing the need for a large internal buffer and enhancing map hit rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a high-capacity internal buffer is included in the storage device, then map hit rate and operational speed are improved, but device size and manufacturing cost increase
Solution Approach 1:
The patent extracts the buffer function from the storage device itself and relocates it to the host system's memory resources. The host memory buffer outside the storage device is utilized to store map data, thereby reducing the internal buffer capacity needed within the storage device while maintaining high map hit rates.
Solution Approach 2:
The host memory buffer, which serves general-purpose memory functions in the host system, is made to serve dual purposes by also functioning as a map data buffer for the storage device. This multi-functionality eliminates the need for dedicated high-capacity buffer memory within the storage device.
2Productivity
If a high-capacity internal buffer is included in the storage device, then address translation efficiency is improved, but manufacturing cost increases
Solution Approach 1:
The buffer capacity required for efficient address translation is extracted from the storage device's internal components and relocated to the host system's existing memory resources. This eliminates the need to manufacture and integrate high-capacity buffer memory into the storage device, thereby reducing manufacturing costs.
Solution Approach 2:
The host memory buffer acts as an intermediary between the storage device's controller and the permanent storage media. It facilitates efficient address translation operations by providing a staging area for map data without requiring the storage device to include expensive high-capacity buffer memory.
3Volume of stationary object
If map data is stored in external host memory buffer, then internal buffer size is reduced, but additional memory management complexity is introduced
Solution Approach 1:
The host system's memory management subsystem is leveraged to automatically manage the map data stored in the host memory buffer. The existing memory management mechanisms of the host system handle allocation, addressing, and access to the buffer resources, eliminating the need for the storage device to implement complex dedicated buffer management logic.
Data Source
AI summary
A storage device includes a controller and a memory. In response to a request of a host, the controller generates: (A) a first list as a result of counting: (1) the number of first page numbers included in a first range among page numbers included in a logical address received from the host and (2) the number of second page numbers included in a second range not overlapping the first range, (B) generates a second list as a result of respectively grouping the first page numbers and the second page numbers based on the first list, and (C) translates the logical address to a physical address based on the second list and the first map data. The memory stores the first map data to be provided to the controller. The first map data matches the first page numbers and the second page numbers with respective physical addresses.