Storage Device Metadata Switching for Boot Time and Wear Balance
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Solution Overview
Problem
Existing storage devices face challenges in reducing booting time and extending lifespan due to inefficient management of meta data operations across memory devices.
Innovation Solution
A storage device with multiple memory devices and cores that dynamically switches the core responsible for storing meta data when the operation count exceeds a threshold, optimizing the distribution of meta data storage and read operations to balance performance and lifespan.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single core is used to store all meta data in a memory device, then the management of meta data is simplified, but the booting time increases and the lifespan of the memory device decreases due to concentrated wear
Solution Approach 1:
The patent divides the meta data storage responsibility across multiple cores, where each core manages a specific portion of meta data in different memory devices. This segmentation allows parallel reading of meta data during booting, reducing booting time, and distributes wear across multiple memory devices, extending system lifespan.
2Ease of manufacture
If a single core continuously stores meta data operations, then the implementation is straightforward, but the lifespan of the memory device deteriorates due to excessive wear on a single memory device
Solution Approach 1:
The patent segments meta data storage across multiple memory devices controlled by different cores. Each core maintains a portion of meta data, distributing write operations and wear across multiple devices. This approach maintains implementation simplicity through modular core design while significantly extending memory device lifespan by preventing excessive wear concentration.
3Device complexity
If meta data is stored in a single memory device, then the structure is simple, but the booting operation time increases due to sequential access requirements
Solution Approach 1:
The patent segments meta data across multiple memory devices, each accessible by different cores. During booting, multiple cores can simultaneously read their respective portions of meta data in parallel, dramatically reducing booting operation time compared to sequential access from a single memory device.
Solution Approach 2:
The patent transitions from a single-dimension storage structure (one memory device) to a multi-dimensional structure (multiple memory devices accessed by multiple cores). This dimensional expansion enables parallel access paths, reducing the time required for booting operations while maintaining manageable structural complexity.
4Device complexity
If one core handles all meta data operations, then the control logic is simplified, but the performance and reliability of the storage device deteriorates
Solution Approach 1:
The patent segments control responsibilities across multiple cores, with each core managing specific meta data operations for its associated memory device. This segmentation improves reliability by distributing operational load and preventing single points of failure, while control logic remains relatively simple through modular design patterns.
Solution Approach 2:
The patent changes the parameter of core assignment for meta data operations. Instead of one core handling all operations, the system dynamically assigns different cores to handle meta data operations based on thresholds and wear levels, optimizing both reliability and performance while maintaining manageable control logic through parameter-based decision making.
Data Source
AI summary
A storage device includes a plurality of memory devices, a plurality of cores controlling the plurality of memory devices, and a host interface configured to select a first core of the plurality of cores to store a plurality of meta data in a memory device controlled by the first core, and configured to switch to a second core from the plurality of cores to store the plurality of meta data in a memory device controlled by the second core, when the number of operations for storing a first meta data, from among the plurality of meta data, by the first core exceeds a threshold value.