Storage Device Power Supply Circuit for Data Retention
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Solution Overview
Problem
Non-volatile memory storage devices experience data loss due to variations in threshold voltage of infrequently accessed memory cells when in a power-off state, leading to increased data retention issues over time.
Innovation Solution
A storage device with a power supply circuit that receives a power disable signal, powers off the storage controller, and after a reference time, provides internal voltage only to the processor for data recovery operations while maintaining the host interface in a power-off state, thereby reducing data loss and extending device lifespan.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the storage device is maintained in a power-off state to reduce power consumption, then power saving is improved, but data retention deteriorates due to threshold voltage variation in infrequently accessed memory cells
Solution Approach 1:
The patent applies periodic action by implementing a reference time mechanism that periodically activates the processor to perform data recovery operations on the non-volatile memory even when the storage device is in a power-off state. The power supply circuit is configured to provide power to the processor at predetermined intervals (reference time periods) while keeping other components powered off, enabling periodic data recovery without continuous power consumption. This resolves the contradiction by maintaining data retention through periodic actions rather than continuous operation.
2Reliability
If the processor is continuously powered on to perform data recovery operations, then data retention is improved, but power consumption increases
Solution Approach 1:
The patent applies segmentation by dividing the power supply configuration into distinct segments: the processor is powered on only during reference time periods to perform data recovery operations, while the host interface and other components remain powered off. The power supply circuit is segmented to provide power selectively to different components at different times, enabling the processor to perform necessary data recovery functions without requiring continuous power to the entire storage device. This resolves the contradiction by segmenting the power distribution to match the actual operational needs of each component.
3Use of energy by moving object
If the storage controller is powered off to save power, then power consumption is reduced, but the ability to perform data recovery operations deteriorates
Solution Approach 1:
The patent applies dynamics by making the power state of the processor dynamic rather than static. The processor transitions between powered-off and powered-on states based on the reference time mechanism. During normal operation, the processor remains powered on; during power-off periods, the processor is dynamically activated at reference time intervals to perform data recovery operations, then powered off again. This dynamic power state management enables the storage controller to maintain data recovery capability without requiring continuous power, resolving the contradiction between power savings and operational capability.
Data Source
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AI summary
A storage device includes a power supply circuit that receives a power disable signal from a host device and provides a first internal voltage and a second internal voltage, a nonvolatile memory including a memory device, and a storage controller that controls the nonvolatile memory and includes a processor that performs a data recovery operation on data stored in the memory device and a host interface that communicates with the host device. When the power disable signal is activated at a power off time, the storage controller is powered off, the power supply circuit interrupts the first internal voltage and the second internal voltage during a reference time following the power off time, and provides the first internal voltage to the processor after the reference time has elapsed following the power off time.