Storage Device With Detachable SD Express Slots
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Solution Overview
Problem
Current semiconductor memory devices, particularly high-capacity/high-speed micro SD cards, face challenges in achieving efficient high-speed operation and flexible storage capacity due to limitations in the SD Express interface and detachable SD Express device configurations.
Innovation Solution
A storage device design incorporating a detachable SD Express device with a printed circuit board featuring multiple slots and signal lines for connecting SD Express devices, allowing for variable storage capacity and speed adjustments by mounting additional SD Express devices, which increases the number of PCIe lanes and enhances performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If micro SD cards are used for high-capacity/high-speed operations, then storage capacity is improved, but operational performance and speed are limited due to interface constraints
Solution Approach 1:
The storage device is divided into multiple independent SD Express slots that can be individually configured. Each slot operates independently with its own PCIe lane connection, allowing the system to segment storage capacity from speed constraints. Users can insert high-capacity SD Express cards in slots with adequate PCIe lane support while maintaining optimal speeds.
Solution Approach 2:
The patent transitions from the traditional single-interface SD card model to a multi-dimensional architecture where multiple SD Express devices connect through separate PCIe lanes. This dimensional change allows simultaneous access to multiple storage devices at high speeds, effectively breaking the single-interface speed bottleneck while maintaining high storage capacity.
2Adaptability or versatility
If detachable SD Express devices are used, then flexibility and adaptability are improved, but device complexity increases due to multiple slots and signal lines
Solution Approach 1:
The storage device employs multiple SD slots that universally accept various SD Express card types and configurations. Each slot is designed with the same interface specifications, allowing users to mix and match different capacity and speed cards across slots. This universal design simplifies the user experience despite the underlying complexity of multiple PCIe lane connections.
Solution Approach 2:
The system dynamically configures PCIe lane allocations based on which SD Express devices are inserted and their performance requirements. The controller automatically adjusts resource distribution, enabling the device to adapt to different configurations without requiring manual intervention or complex wiring changes.
3Productivity
If multiple SD Express devices are mounted to increase PCIe lanes, then performance is improved, but manufacturing complexity increases
Solution Approach 1:
The PCB is pre-configured with multiple SD slot interfaces and PCIe lane routing during manufacturing, but the actual performance optimization occurs when devices are inserted. This preliminary structural preparation simplifies manufacturing by using standardized multi-slot designs, while the high-performance configuration is achieved through user-selectable card combinations rather than complex custom wiring.
Solution Approach 2:
The patent uses replicated SD slot designs across the PCB, where each slot follows the same standardized interface and connection pattern. This copying approach simplifies manufacturing by allowing mass production of identical slot modules that can be consistently assembled, rather than requiring custom routing for each performance configuration.
Data Source
AI summary
A storage device includes a storage controller and a printed circuit board. The printed circuit board includes a host interface connector including first pins coupled to an external host device, a controller socket in which the storage controller is mounted, and a first slot that may receive a first secure digital (SD) Express device, the first slot including second pins to be coupled to the first SD Express device. A first receive pin among the first pins is connected to a first receive pin among the second pins, a second receive pin among the first pins is connected to a second receive pin among the second pins, a first transmit pin among the first pins is connected to a first transmit pin among the second pins, and a second transmit pin among the first pins is connected to a second transmit pin among the second pins.