Storage Device Sharing via Arbitration Potential Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional storage device architectures with multiple chips and non-volatile random-access memory (NVRAM) lead to increased costs, power consumption, and PCB usage area due to the need for multiple firmware storage solutions and signal amplification chips.
Innovation Solution
A storage device sharing system where multiple chips share a single storage device, utilizing arbitration terminals and control potentials to dynamically switch between master and slave modes for efficient communication, reducing the number of storage devices and thus minimizing power consumption and circuit board area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple NVRAM chips are used to store firmware for multiple chips, then each chip can independently store and access firmware, but the PCB usage area and system cost increase significantly
Solution Approach 1:
Multiple chips share a single NVRAM device through arbitration terminals. The first chip has a first arbitration terminal and the second chip has a second arbitration terminal connected to the first. By controlling arbitration potentials, multiple chips can access the shared NVRAM sequentially, eliminating the need for each chip to have its own dedicated NVRAM while maintaining firmware storage capability.
Solution Approach 2:
The single NVRAM device serves multiple chips simultaneously by functioning as a shared resource. The arbitration mechanism allows the NVRAM to be accessed by different chips at different times, making one storage device universal for multiple firmware storage needs rather than requiring dedicated storage for each chip.
2Reliability
If multiple NVRAM chips are used for firmware storage, then each chip has dedicated storage, but power consumption increases
Solution Approach 1:
Multiple chips share a single NVRAM device through arbitration terminals. The first chip has a first arbitration terminal and the second chip has a second arbitration terminal connected to the first. By controlling arbitration potentials, multiple chips can access the shared NVRAM sequentially, eliminating the need for each chip to have its own dedicated NVRAM while maintaining firmware storage capability.
Solution Approach 2:
The single NVRAM device serves multiple chips simultaneously by functioning as a shared resource. The arbitration mechanism allows the NVRAM to be accessed by different chips at different times, making one storage device universal for multiple firmware storage needs rather than requiring dedicated storage for each chip.
3Productivity
If arbitration mode is activated for preferential communication events, then communication priority is improved, but system complexity increases
Solution Approach 1:
The system dynamically switches between toggle mode and arbitration mode based on communication needs. During normal operation, chips use simple toggle mode for basic communication. When preferential communication events occur, the system transitions to arbitration mode where the first chip can control the arbitration potential to grant priority access to the NVRAM, providing dynamic adaptability rather than fixed complexity.
Solution Approach 2:
The arbitration potential parameter is used to control access priority. By changing the potential level on the arbitration terminal, the system can dynamically assign master or slave status to chips, enabling priority-based communication without requiring complex hardware structures. The potential change serves as a simple control mechanism for managing access rights.
Data Source
AI summary
A storage device sharing system and a storage device sharing method are provided. The storage device sharing system includes a storage device, a first chip and a second chip. The first chip and the second chip are configured to enter a toggle mode and an arbitration mode. In the toggle mode, the first chip that acts as the master controls the arbitration potential to a first control potential and a second control potential, and communicates with the storage device in response to the arbitration potential being the first control potential, and the second chip that acts as a slave communicates with the storage device in response to the arbitration potential being the second control potential.


