Storage Element Multiple Clock Circuits Power Reduction
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Solution Overview
Problem
Existing computer storage elements consume significant power due to clock switching, and current clock gating techniques do not effectively manage power dissipation by uniformly applying clock signals to all storage circuits, leading to inefficiencies in dynamic power management.
Innovation Solution
Implementing multiple clocking schemes within a storage element, where different portions are clocked according to distinct criteria based on their frequency characteristics, allowing for granular control of clock inputs to reduce power consumption by disabling unnecessary clocking of low-frequency components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If uniform clock gating is applied to all storage circuits, then power consumption is reduced, but clocking efficiency deteriorates due to inability to differentiate between high-frequency and low-frequency components
Solution Approach 1:
The storage element is divided into multiple groups of storage circuits, where each group is associated with a separate clock circuit. This segmentation allows different clocking schemes to be applied to different groups, enabling high-frequency groups to be clocked continuously while low-frequency groups use clock gating, thus resolving the contradiction between power reduction and clocking efficiency.
Solution Approach 2:
Different clocking schemes are applied locally to different groups of storage circuits based on their frequency characteristics. High-frequency groups receive continuous clock signals while low-frequency groups receive gated clock signals, allowing each local region to operate optimally for its specific requirements, thereby maintaining overall clocking efficiency while reducing power consumption.
2Use of energy by moving object
If clock gating is applied to reduce power dissipation, then energy efficiency improves, but device complexity increases due to additional logic required
Solution Approach 1:
The storage element is segmented into multiple groups, each with its own clock circuit. This segmentation distributes the complexity across multiple simpler clock circuits rather than requiring one complex clock gating mechanism for the entire storage element, making the overall system more manageable and easier to implement.
Solution Approach 2:
The system dynamically selects different clocking schemes for different groups of storage circuits based on their operational characteristics. This dynamic approach allows the system to adapt to varying frequency requirements without requiring complex static design decisions, simplifying the overall control logic while maintaining energy efficiency.
Data Source
AI summary
Techniques relating to providing clock signals to a storage element. Generally, different portions of a given storage element may be clocked according to different schemes. This technique may be pertinent to a storage element that has a portion for which the associated bit values do not change frequently relative to another portion of the storage element. For such a storage element, a high-frequency portion may be clocked upon an access to the storage element, while a low-frequency portion may be clocked only if there is a change in the associated bit values. This technique can be applied to various storage elements, including registers and FIFO buffer entries. An apparatus may be designed such that the low-frequency and high-frequency portions of a storage element do not change during operation. Alternatively, the low-frequency and high-frequency portions of the storage element may be changeable based on a current operating mode of the apparatus.