Storage Device Equalizer Adjustment via Eye-Diagram Analysis
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Solution Overview
Problem
In high-speed data transmission between a host and a storage device, data errors due to jitters, voltage fluctuations, and Inter-Symbol Interference (ISI) are not timely corrected because the host side relies solely on triggering equalization adjustments, leading to delayed error correction.
Innovation Solution
A storage device with a processing unit that activates an eye-diagram analyzer to adjust equalizer parameters after detecting symbol decoding errors, repeatedly adjusting until successful or reaching an adjustment failure, ensuring timely correction of data errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the host side triggers equalization adjustment according to standard specifications, then the equalization adjustment can be initiated in a standardized manner, but the timing of correcting transmission errors is delayed because the device side discovers errors earlier than the host side
Solution Approach 1:
The patent inverts the traditional equalization adjustment initiation role from the host side to the device side. The storage device autonomously triggers equalization adjustment when it detects symbol decoding errors, rather than waiting for the host to initiate the adjustment. This inversion enables the device side to correct transmission errors at the earliest possible moment, significantly reducing error correction timing delay while maintaining standardized equalization adjustment procedures.
2Ease of operation
If the host side alone triggers equalization adjustment, then the control flow follows standard specifications, but data errors remain uncorrected during high-speed transmission because the device side detects errors earlier
Solution Approach 1:
The storage device performs self-service by autonomously detecting symbol decoding errors and triggering equalization adjustment on its own behalf. The device monitors its received data quality, identifies transmission errors, and initiates corrective equalization adjustments without requiring host intervention. This self-service mechanism ensures data integrity is maintained through timely error correction while keeping the control interface simple and standardized.
Solution Approach 2:
The patent implements a feedback mechanism where the device side continuously monitors symbol decoding error rates and uses this feedback to trigger equalization adjustments. When the error rate exceeds a threshold, the device feeds back this information and initiates equalization parameter adjustments. This closed-loop feedback ensures data integrity is actively maintained through real-time error detection and correction while preserving straightforward control procedures.
3Reliability
If equalization adjustment is delayed until the host discovers errors, then standard specifications are followed, but data loss increases due to prolonged transmission errors
Solution Approach 1:
The device side performs preliminary action by detecting symbol decoding errors and triggering equalization adjustments before the host would discover the same errors. This preliminary error detection and correction action prevents prolonged transmission errors that would lead to data loss. By acting early, the device maintains transmission stability and minimizes data loss while still adhering to standardized equalization adjustment protocols.
Data Source
AI summary
The invention introduces a non-transitory computer program product for adjusting equalization when executed by a processing unit of a storage device. The non-transitory computer program product includes program code to: activate an eye-diagram analyzer to adjust a parameter of an equalizer according to magnitudes corresponding to an eye-diagram, which are generated by the eye-diagram analyzer, and repeatedly adjust a parameter of the equalizer after a symbol decoding error is detected until an adjustment failure is detected or successive waveforms output from the equalizer belong to an eye open state. The symbol decoding error is detected during a reception of host data from a host side according to a command issued by the host side, which is defined in Universal Flash Storage (UFS) specification.