Multi-Protocol Storage Erase Resumption Across Mode Switching

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current storage devices face issues with incomplete data erasure and inefficient power management across different modes, leading to performance degradation and increased power consumption when switching between NVMe and SD modes, and lack of host control over background operations in NVMe mode.

Innovation Solution

The storage device includes a controller that manages in-progress bits to ensure complete data erasure across mode transitions and allows host control over background operations, enabling seamless data erasure and power management by executing commands in the appropriate mode.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the storage device runs non-optional background/maintenance operations in NVMe mode during idle periods, then data maintenance is performed, but power consumption increases when the device is not performing host I/O operations

Engineering Contradiction:
Improvedata maintenanceVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent makes background operations dynamic by allowing the host to enable or disable them based on power management needs. The controller checks a control value associated with background operations and adjusts execution accordingly, transitioning from static mandatory execution to dynamic conditional execution that adapts to host power requirements.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The host can pre-configured the control value for background operations before mode switching occurs. This allows the host to anticipate power management needs and prepare the appropriate state for background operations in advance, preventing unwanted power consumption during idle periods while ensuring data maintenance when needed.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If the host switches from NVMe mode to SD mode before maintenance operations are complete, then mode flexibility is achieved, but performance decreases as maintenance operations must be completed in foreground

Engineering Contradiction:
Improvemode switching flexibilityVSAvoidstorage device performance
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The controller provides feedback to the host about the status of background operations through control values and status indicators. This feedback mechanism allows the host to make informed decisions about mode switching and background operation management, enabling the system to maintain performance by coordinating mode transitions with operation completion status.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The control value associated with background operations serves as an intermediary between the host's power management decisions and the controller's operation execution. This intermediary mechanism allows seamless coordination between host intentions and controller actions, enabling smooth mode transitions without performance degradation.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Loss of energy

If the storage device is powered off during format or sanitize operation, then power consumption is reduced, but data erasure becomes incomplete and requires re-execution in another mode

Engineering Contradiction:
Improvepower consumptionVSAvoiddata erasure completeness
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The controller performs preliminary actions by setting in-progress variables and storing current format/sanitize configurations before the operation completes. This preliminary state preservation allows the operation to be resumed after power cycles, eliminating the need to re-execute the entire operation and ensuring complete data erasure even when powered off during execution.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The storage device serves itself by automatically detecting incomplete operations through in-progress variables and enabling resumption without host intervention. The controller autonomously manages the state persistence and recovery, allowing the device to maintain operation integrity across power cycles without requiring host awareness or action.

Inventive Principle:
Principle #25Self-service

4Reliability

If the storage device initializes upon mode switching after incomplete format/sanitize operation, then data security is maintained, but additional I/O commands are blocked and device functionality is reduced

Engineering Contradiction:
Improvedata securityVSAvoidI/O command availability
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The controller performs preliminary validation of in-progress variables during mode switching to determine whether format/sanitize operations were completed. This preliminary check allows the device to distinguish between safe and unsafe states, enabling I/O commands when operations are complete while blocking them only when necessary for security, thus maintaining both data security and operational availability.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12572460B2Completing a device operation initiated in a first mode in a second mode in a multi-protocol storage device
Publication Date: 2026.03.10 SANDISK TECHNOLOGIES LLC
  • US12572460B2 patent drawing
  • US12572460B2 patent drawing
  • US12572460B2 patent drawing

AI summary

A storage device may communicate with a host in multiple modes and physically erase data stored on a memory device in each mode. The storage device includes a memory device to store data. A controller on the storage device may receive a first command from the host to erase the data when the storage device communicates with the host in a first mode. The controller may execute the first command in the first mode and set an in-progress bit. The controller may determine when the storage device has switched to communicate with the host in a second mode and may determine that the in-progress bit is set. The controller may provide a first indication to the host, and in response to the first indication, receive a second command from the host. The controller may execute the second command in the second mode to erase the data in the second mode.