Storage Device Interface for Multi-Memory Status Aggregation
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Solution Overview
Problem
Existing storage devices face inefficiencies in checking the internal statuses of multiple memory devices due to increased overhead and the need for additional pins to manage die selection signals, which hampers I/O processing speed.
Innovation Solution
A storage device design that allows for checking the internal statuses of multiple memory devices without a die selection signal and separate pins, utilizing a memory controller, interface circuit, and package controller to manage status data transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a die selection signal is used to check the internal status of each memory device, then the memory controller can identify which memory device's status to check, but the overhead required to check internal statuses of multiple memory devices increases
Solution Approach 1:
The patent merges the status checking function into the command signal itself. Instead of using a separate die selection signal followed by a status check command, the ready/busy status is directly incorporated into the command signal that selects the memory device. This integration eliminates the need for separate status checking operations and reduces overhead.
Solution Approach 2:
The command signal serves multiple functions simultaneously: it selects the memory device and carries the ready/busy status information. By making the command signal multi-functional, the patent eliminates the need for separate die selection signals and dedicated status check commands, thereby reducing the overhead of status checking operations.
2Measurement precision
If separate pins are added for ready/busy status checking of each memory device, then the internal status can be checked accurately, but the number of pads in the memory controller increases
Solution Approach 1:
The patent combines the ready/busy status signal with the command signal that is already present on existing pads. Instead of adding separate pins for status checking, the status information is multiplexed onto the command signal lines, allowing status detection without increasing the number of pads.
Solution Approach 2:
The command signal is made multi-functional by incorporating both the memory device selection and the ready/busy status information within the same signal. This allows a single pad to serve multiple purposes: identifying the selected device and detecting its status, thereby avoiding the need for additional pads.
3Quantity of substance
If the number of memory devices connected to one memory controller is increased, then the storage capacity is improved, but the overhead required to check internal statuses of multiple memory devices increases
Solution Approach 1:
The patent merges the status checking operation with the normal command execution. By incorporating the ready/busy status into the command signal itself, the system can check the status of multiple memory devices during normal operation without requiring separate status checking cycles, thus maintaining high efficiency even as the number of devices increases.
Solution Approach 2:
The command signal serves as a universal carrier for both device selection and status information across all memory devices. This multi-functional approach allows the memory controller to efficiently manage and check the status of multiple devices without increasing the overhead, as the same signal mechanism is used for all devices regardless of quantity.
Data Source
AI summary
A storage device is provided. The storage device includes: a plurality of memory devices configured to output status data indicating a busy state indicating an internal operation is being performed or a ready state; and an interface circuit configured to receive a command for reading the status data of the plurality of memory devices, receive the status data of each of the plurality of memory devices from the plurality of memory devices, and output entire status data indicating statuses of the plurality of memory devices based on the status data of each of the plurality of memory devices.