Storage System Intermediate Parity Write Amplification
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Solution Overview
Problem
The lifetime and reliability of nonvolatile memory, particularly flash memory, are reduced due to repetitive write operations, which cause erase operations and lead to decreased performance and reliability.
Innovation Solution
An electronic device with multiple storage devices, each having a first storage area for sequential writes and a second storage area for random writes, where an intermediate parity is generated and stored in the second storage area to reduce write amplification and improve reliability, using a processing circuitry to manage RAID stripes and parity across these areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If repetitive write operations are performed in nonvolatile memory, then data can be continuously stored and updated, but the lifetime and reliability of the memory are reduced
Solution Approach 1:
The storage device is divided into multiple storage areas (first storage area for sequential writes, second storage area for random writes and parity). This segmentation allows different write operations to be handled differently, reducing write amplification in the first area while maintaining reliability through the second area.
Solution Approach 2:
An intermediate parity is introduced as a mediator between data writes and final parity storage. The intermediate parity is first written to the second storage area, then used to generate the final parity. This intermediary step reduces the number of direct write operations to the first storage area, thereby reducing write amplification and extending memory lifetime.
2Productivity
If write operations are performed in nonvolatile memory, then data can be stored, but erase operations are required between writes which reduces reliability
Solution Approach 1:
The intermediate parity is prepared and written to the second storage area before the final parity is computed and written to the first storage area. This preliminary action of storing the intermediate parity first allows the final parity to be written without requiring erase operations, thereby improving reliability while maintaining storage capability.
3Productivity
If sequential data is written based on sequential logical addresses, then write operations are efficient, but write amplification increases in flash memory
Solution Approach 1:
The storage device is segmented into a first storage area for sequential writes and a second storage area for random writes and parity. This segmentation allows sequential writes to be handled efficiently in the first area while preventing write amplification by offloading parity operations to the second area.
Solution Approach 2:
The intermediate parity acts as an intermediary that reduces write amplification. By first writing the intermediate parity to the second storage area and then using it to generate the final parity, the system reduces the number of repetitive write operations in the first storage area, thereby lowering the write amplification factor.
Data Source
AI summary
Disclosed is a storage system which includes a random access memory, storage devices, and a processing unit that controls the random access memory and the storage devices. Each of the plurality of storage devices includes a first storage area and a second storage area. The processing unit assigns a zone to the first storage areas of the storage devices. The processing unit assigns RAID stripes to the zone, performs a write of sequential data, which are based on sequential logical addresses, with respect to each of the RAID stripes, and performs a write of a parity corresponding to the write of the sequential data after the write of the sequential data is completed. The processing unit writes an intermediate parity corresponding to the parity in the second storage area of at least one storage device among the storage devices while performing the write of the sequential data.