Storage System I/O Processing Queue Segmentation
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Solution Overview
Problem
In storage systems with multiple processors, high-speed I/O processing is hindered by access competition due to shared memory, leading to increased operation costs from the need for dedicated memory and interfaces.
Innovation Solution
A storage system configuration where each processor manages a logical volume and port, with a cache memory storing data related to I/O requests, reducing memory access and operation costs by eliminating the need for dedicated hardware and memory division.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple processors share a memory in a storage system, then hardware cost is reduced, but access competition occurs leading to reduced I/O processing speed
Solution Approach 1:
The patent segments the memory access by dividing I/O requests into multiple queues (command queue, data in queue, data out queue) and assigning specific processors to specific queues. This segmentation eliminates access competition by ensuring that each processor accesses only its designated queue areas, while still sharing the physical memory resource. The memory is logically divided into queue areas without requiring physical memory division.
2Productivity
If dedicated memory and interface are provided for each processor, then I/O processing speed is improved, but hardware cost and management cost increase
Solution Approach 1:
The patent makes the shared memory serve multiple functions simultaneously - it acts as both the common memory resource and as dedicated queue storage areas for multiple processors. The same physical memory is universally used by all processors, but through logical segmentation into queues, it provides dedicated access paths. This eliminates the need for separate dedicated memory modules while maintaining the performance benefits of dedicated memory access.
3Productivity
If cache memory is used to store I/O request data, then memory access frequency is reduced, but cache memory management complexity increases
Solution Approach 1:
The patent merges the cache memory functionality with the existing queue structures. The cache memory is integrated into the controller and works in conjunction with the command queue, data in queue, and data out queue. Data is cached in the cache memory and then processed through the queue system, combining caching benefits with the existing segmented queue architecture without requiring separate complex cache management systems.
Data Source
AI summary
A storage system provides a logical volume to a computer, manages the logical volume and a port receiving an I/O request for the logical volume in correspondence with each other, and holds assigned processor management information for managing correspondence between a processor for executing I/O processing based on an I/O request accumulated in a queue and an assigned port being a port corresponding to the queue. The processor identifies an assigned port on the basis of the assigned processor management information, executes I/O processing for the logical volume corresponding to the assigned port, and executes I/O processing on the basis of an I/O request received via the assigned port corresponding to another operation core.