Storage Key Marking for Virtual Memory Translation Structures

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In computing environments with virtualization technology, the latency for rebuilding translation look-aside buffer (TLB) entries increases when memory backing address translation tables is paged out, and the hypervisor lacks intelligence in paging decisions due to unknown ownership of pages backing these tables.

Innovation Solution

A computer-implemented method is introduced where a processor determines active use of address translation structures by setting an indicator in a storage key based on address translation requests, allowing the hypervisor to make informed paging decisions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory backing address translation tables is paged out to storage medium, then memory capacity is increased, but latency for rebuilding TLB entries increases significantly

Engineering Contradiction:
Improvememory capacityVSAvoidlatency for rebuilding TLB entries
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The system sets an indicator in the storage key before paging out memory pages that back address translation structures. This preliminary marking allows the hypervisor to identify and protect these critical pages during paging decisions, preventing them from being paged out and thus avoiding the time-consuming process of rebuilding TLB entries later.

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If hypervisor makes paging decisions without knowing page ownership, then system complexity is reduced, but paging intelligence and efficiency deteriorate

Engineering Contradiction:
Improvesystem complexityVSAvoidpaging efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The guest operating system automatically sets an indicator in the storage key when it uses memory pages to back address translation structures. This self-service mechanism provides the hypervisor with the necessary information about page ownership and usage without requiring complex tracking mechanisms, enabling intelligent paging decisions while maintaining system simplicity.

Inventive Principle:
Principle #25Self-service

3Measurement precision

If operating system manually tracks page usage for hypervisor notification, then paging information accuracy is improved, but operational overhead increases

Engineering Contradiction:
Improvepage usage information accuracyVSAvoidoperational overhead
Core Design Contradiction:
Measurement precisionVSEase of operation

Solution Approach 1:

The system leverages the existing storage key mechanism that is already maintained by the operating system for memory management. By setting an indicator in this existing structure when address translation structures are backed by particular pages, the system obtains accurate page usage information without requiring separate tracking mechanisms or increased operational overhead.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS10515020B2Marking storage keys to indicate memory used to back address translation structures
Publication Date: 2019.12.24 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US10515020B2 patent drawing
  • US10515020B2 patent drawing
  • US10515020B2 patent drawing

AI summary

A marking capability is used to provide an indication of whether a block of memory is backing an address translation structure of a control program being managed by a virtual machine manager. By providing the marking, the virtual machine manager may check the indication prior to making paging decisions. With this information, a hint may be provided to the hardware to be used in decisions relating to purging associated address translation structures, such as translation look-aside buffer (TLB) entries.