Storage Map Buffering Using Host Memory Offload

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Solution Overview

Problem

The increasing capacity of NAND flash memory in storage devices necessitates a high-capacity buffer memory to manage the growing amount of map data, leading to increased costs and limitations in capacity due to the physical constraints of existing buffer memories.

Innovation Solution

A computing device architecture that utilizes a nonvolatile storage device with an internal buffer memory and a shared interface with a memory device, where map data is initially stored in the memory's buffer memory and then partially transferred to an external buffer memory for efficient management, eliminating the need for a high-capacity dedicated buffer memory in the storage device.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the capacity of NAND flash memory is increased, then the storage capacity is improved, but the capacity of map data increases requiring a high-capacity buffer memory which increases costs and is limited by physical constraints

Engineering Contradiction:
Improvestorage capacityVSAvoidbuffer memory capacity requirement
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent divides the buffer memory functionality into two separate components: an internal buffer memory within the storage device for frequently accessed map data, and an external buffer memory in the host system for storing larger portions of map data. This segmentation allows the storage device to maintain high performance for active operations while offloading the burden of storing large amounts of map data to the host's existing memory resources.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent enables the host system's existing buffer memory to serve dual purposes: storing user data and storing map data for the storage device. By allowing the host's buffer memory to function as the storage device's external buffer memory, the system eliminates the need for the storage device to have a large dedicated buffer memory, thereby reducing costs and physical constraints.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Ease of operation

If a high-capacity dedicated buffer memory is provided in the storage device, then the management of large amounts of map data is improved, but the costs and physical constraints increase

Engineering Contradiction:
Improvemap data managementVSAvoidbuffer memory capacity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent extracts the function of storing large amounts of map data from the storage device and relocates it to the host system's buffer memory. The storage device retains only the essential internal buffer memory for active map data operations, while the host system assumes responsibility for storing the majority of map data, thereby reducing the storage device's complexity and physical constraints.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a communication interface between the storage device and the host system that enables the host's buffer memory to be accessed and managed as if it were part of the storage device. This intermediary mechanism allows the host's existing memory resources to be utilized for map data storage without requiring physical modification or additional hardware in the storage device.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP4276634B1Storage device, computing device including storage device and memory device, and operating method of computing device
Publication Date: 2026.02.18 SAMSUNG ELECTRONICS CO LTD
  • EP4276634B1 patent drawingFigure 1
  • EP4276634B1 patent drawingFigure 2
  • EP4276634B1 patent drawingFigure 3

AI summary

A computing device includes a storage device and a memory. The storage device includes nonvolatile and internal buffer memories, and a storage controller that controls the nonvolatile and internal buffer memories and communicates with a bus. The memory includes a buffer memory and a memory controller that controls the buffer memory and communicates with the bus. The nonvolatile memory stores user data and map data. In an initialization operation, the storage controller sends the map data to the memory through the bus, and the memory controller stores the map data that is transferred from the storage device through the bus, in the buffer memory. After the initialization operation, the memory controller sends partial map data of the map data to the storage device through the bus, and the storage controller stores the partial map data that is transferred from the memory through the bus, in the internal buffer memory.