Storage Media Controller Write-Leveling Phase Shift Adjustment
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Solution Overview
Problem
High data rate storage media, such as DDR SDRAM, face synchronization issues between clock and data strobe signals due to trace length differences on the motherboard, leading to asynchronous signal reception and failed write operations.
Innovation Solution
A storage media controller with a phase-shift module, counter, and computing unit performs a write-leveling operation by adjusting the data strobe signal based on phase shifts to ensure synchronization with the clock signal, using a counter to verify reliable transitions and adjust the data strobe signal accordingly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the data rate is increased, then the data transmission speed is improved, but the synchronization between clock signal and data strobe signal deteriorates due to trace length differences
Solution Approach 1:
The patent applies preliminary action by performing a write-leveling operation before actual write operations to pre-adjust the phase relationship between clock and data strobe signals. The phase-shift module performs phase adjustment in advance based on trace length differences, ensuring synchronization is established before data transmission begins, thus resolving the contradiction between high data rate and signal synchronization reliability
2Reliability
If the trace length difference is compensated, then the signal synchronization is improved, but the device complexity increases due to additional phase adjustment mechanisms
Solution Approach 1:
The patent applies parameter changes by adjusting the phase shift parameter of the data strobe signal dynamically. The phase-shift module modifies the phase parameter based on detected synchronization status and trace length characteristics, allowing the system to adapt to different trace length differences without requiring complex hardware modifications, thus improving synchronization while controlling device complexity
Solution Approach 2:
The patent implements feedback by using the data signal returned from the storage media to detect synchronization status. The computing unit analyzes the transition events in the returned data signal to determine whether phase adjustment is needed, and feeds this information back to the phase-shift module for iterative adjustment, creating a closed-loop system that achieves synchronization with manageable complexity
Data Source
AI summary
A storage media control method, by which a data strobe signal is shifted by different phase shifts at different time intervals during a write-leveling operation to be received by a storage media and compared to a clock signal for returning a data signal. At the storage media side, during the write-leveling operation, a synchronous transmission between the received data strobe signal and the clock signal causes a transition event at the data signal. The number of transition-event occurrences is counted. When the count shows that just one transition event has occurred over a full round of phase shift tests of the data strobe signal, the phase shift corresponding to the transition event is used in the adjustment of the data strobe signal, which is received by the storage media as the data extraction reference of a write operation.


