Storage Memory Mapping for Faster Data Copy Commands

Solution Overview

Problem

Existing storage devices experience increased processing times for commands due to internal operations controlled by the controller, leading to deteriorated operation performance.

Innovation Solution

Incorporating a memory device with multiple storage regions and a controller that utilizes two mapping tables to efficiently determine physical block addresses based on logical block addresses, allowing for improved command processing and lifespan extension.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the controller processes commands through internal operations, then data management is achieved, but processing time increases and operation performance deteriorates

Engineering Contradiction:

Improvedata management capabilityVSAvoidoperation performance

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The mapping table is divided into two separate structures: a first mapping table storing logical block address to physical block address mappings, and a second mapping table storing temporary logical block address to physical block address mappings. This segmentation allows the controller to process different types of address translations independently, improving command processing efficiency without compromising data management reliability.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The controller pre-loads mapping information into both the first mapping table and the second mapping table before command execution. By having mapping information ready in advance in both tables, the controller can quickly determine physical block addresses without performing complex real-time calculations, thus improving operation performance while maintaining reliable data management.

Inventive Principle:

Principle #10Preliminary action

2Device complexity

If a single mapping table is used, then device complexity is reduced, but command processing time increases

Engineering Contradiction:

Improvemapping table structureVSAvoidcommand processing time

Core Design Contradiction:

Device complexityVSLoss of time

Solution Approach 1:

The mapping table is divided into two separate structures: a first mapping table storing logical block address to physical block address mappings, and a second mapping table storing temporary logical block address to physical block address mappings. This segmentation allows the controller to process different types of address translations independently, improving command processing efficiency without compromising data management reliability.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The second mapping table acts as an intermediary structure that temporarily stores mapping information for specific operations. By introducing this intermediate mapping layer, the controller can quickly resolve addresses for frequently accessed or temporary data without searching through the entire first mapping table, thus reducing command processing time while maintaining manageable device complexity.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Ease of operation

If mapping information is stored in memory, then address translation is enabled, but memory lifespan decreases due to write operations

Engineering Contradiction:

Improveaddress translation capabilityVSAvoidmemory lifespan

Core Design Contradiction:

Ease of operationVSDuration of action of stationary object

Solution Approach 1:

The patent extracts and separates the mapping information storage from the main data storage memory. By using a dedicated mapping table structure that can be efficiently updated and managed separately from the primary storage memory, the system reduces the frequency and intensity of write operations to the main memory, thereby extending its lifespan while maintaining effective address translation capability.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The controller dynamically manages the state and update frequency of mapping information in both mapping tables. By optimizing when and how mapping information is updated—only changing parameters when necessary rather than continuous updates—the system maintains accurate address translation while minimizing write operations to memory, thus extending memory lifespan.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS12572467B2Memory device and storage device

Publication Date: 2026.03.10 SK HYNIX INC

AI summary

In an embodiment of the present disclosure, a data copy command of a host device may be processed without moving data in a memory by updating mapping information using a first mapping table between first logical block addresses and physical block addresses and a second mapping table between second logical block addresses and temporary logical block addresses corresponding to the first logical block addresses, whereby it is possible to improve the efficiency of processing the copy command.