Storage Module DRAM Buffer Data Copy Refresh Cycle

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Solution Overview

Problem

Nonvolatile memory devices in storage modules experience delays due to slower operating speeds compared to the interface speed between the processor and memory module, leading to increased delay times when accessing data.

Innovation Solution

A storage module comprising a DRAM device, a nonvolatile memory device, and a high-speed buffer memory, where target data is copied from the nonvolatile memory to the high-speed buffer memory upon entering a page fault mode, and then moved to the DRAM device during a refresh operation in response to a refresh command, optimizing data access and reducing delay times.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If nonvolatile memory device is used in NVDIMM, then data retention without power is achieved, but operating speed is slower compared to interface speed between processor and memory module

Engineering Contradiction:

Improvedata retentionVSAvoidoperating speed

Core Design Contradiction:

ReliabilityVSSpeed

Solution Approach 1:

The storage system is segmented into three distinct memory components: DRAM device for high-speed temporary storage, nonvolatile memory device for persistent storage, and buffer memory for intermediate buffering. This segmentation allows each component to serve its specific function optimally, with the buffer memory acting as a mediator between the slow nonvolatile memory and the fast DRAM interface.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The buffer memory serves as an intermediary component that receives data from the nonvolatile memory device and transfers it to the DRAM device. This intermediary buffer resolves the speed mismatch by providing a high-speed buffer that the DRAM interface can access quickly, while the nonvolatile memory provides persistent storage capability.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Loss of time

If data is copied from nonvolatile memory to DRAM during refresh operation, then data access delay is reduced, but refresh operation time is extended

Engineering Contradiction:

Improvedata access delayVSAvoidrefresh operation time

Core Design Contradiction:

Loss of timeVSDuration of action of moving object

Solution Approach 1:

The buffer memory pre-loads data from the nonvolatile memory device during the refresh operation period. This preliminary action allows the DRAM device to have data ready for immediate access, reducing the overall data access delay time even though the refresh operation itself is extended to accommodate the data copy.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The refresh operation is designed to continue performing both its traditional function of refreshing DRAM cells and the additional function of copying data from nonvolatile memory to the buffer. This continuous useful action ensures that the extended refresh time is productively utilized for data preparation rather than being wasted idle time.

Inventive Principle:

Principle #20Continuity of useful action

Data Source

PatentUS10884655B2Storage modules, methods of operating a storage module, and methods of operating a host controlling a storage module

Publication Date: 2021.01.05 SAMSUNG ELECTRONICS CO LTD

AI summary

A storage module includes a dynamic random access memory (DRAM) device, a nonvolatile memory device, and a high-speed buffer memory. An method of operating the storage module includes copying target data stored in the nonvolatile memory device to the high-speed buffer memory in response to an external device entering a page fault mode, receiving a first refresh command from the external device, and, in response to the first refresh command, performing a first refresh operation associated with the DRAM device and moving the target data copied to the high-speed buffer memory to the DRAM device during a first refresh reference time.