Storage Operation Interrupt Module for NAND Flash Memory
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Solution Overview
Problem
In solid-state storage systems like NAND flash memory, erase operations take longer than write and read operations, leading to blocked access for other operations during ongoing storage operations, causing latency and inefficiency.
Innovation Solution
Implementing a storage operation interrupt module that determines the number of portions for splitting a storage operation, allowing other shorter operations like read or program operations to be executed during interruptions, without an external suspend command, and resuming the paused operation when conditions are met.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If erase operations are performed on storage elements, then data is cleared from memory cells, but access to other cells on the same chip is blocked during the operation
Solution Approach 1:
The patent divides a storage operation into multiple segments or portions, allowing the operation to be paused and resumed. This segmentation enables other operations to interleave during pauses, reducing access latency while maintaining data erasure completeness. The controller can suspend the current operation, perform other operations on the same or different cells, then resume the original operation later.
2Reliability
If program operations are performed on storage elements, then data is written to memory cells, but the storage operation blocks other access to the chip
Solution Approach 1:
The patent implements dynamic operation management where the controller can pause program operations, perform other operations, and resume when conditions permit. This dynamic approach allows the system to adapt to changing workload conditions, maintaining program accuracy while improving overall throughput by utilizing otherwise idle time periods.
3Reliability
If storage operations are executed without interruption, then operation completion is guaranteed, but other shorter operations cannot be performed during the storage operation
Solution Approach 1:
The patent uses preliminary actions by checking conditions before pausing or resuming operations. The controller verifies that pausing will not compromise operation completion and that resuming will occur under appropriate conditions. This preliminary verification ensures reliability while enabling time-efficient interleaving of other operations.
4Reliability
If erase operations take longer than write and read operations, then thorough data clearing is achieved, but system efficiency decreases due to blocked access
Solution Approach 1:
The patent implements periodic pausing of erase operations at predetermined intervals or portions. During these periodic pauses, other operations can be performed on the same or different cells. This periodic interruption maintains thorough data clearing while improving system efficiency by utilizing idle time periods for other productive operations.
Data Source
AI summary
Apparatuses, systems, methods, and computer program products are disclosed for interrupting storage operations. An integrated circuit chip comprising non-volatile memory, the integrated circuit chip configured to, determine a number of portions into which a storage operation is to be split; pause execution of the storage operation from within the integrated circuit chip according to the determined number of portions; execute one or more other storage operations on the integrated circuit chip while the storage operation is paused, each of the one or more other storage operations having a shorter duration than the storage operation; and continue the paused storage operation in response to a trigger.