Storage Device Page-Buffer Backup for Low-Power Data Retention
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Solution Overview
Problem
Existing storage devices face challenges in efficiently managing power consumption, particularly in low power mode, and in preventing memory fragmentation, which affects the speed and efficiency of data processing and storage operations.
Innovation Solution
The storage device includes a memory device with multiple memory units and page buffers, a volatile memory for write data, a power control device, and a processing circuit that backs up write data to a page buffer upon entering low power mode, cutting off power to the volatile memory to conserve energy and prevent fragmentation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If power supply to volatile memory is cut off to reduce power consumption in low power mode, then power consumption is reduced, but data loss occurs and write operations cannot be completed
Solution Approach 1:
The patent applies preliminary action by backing up write data from volatile memory to page buffers before cutting off power supply. The processing circuit transfers data that is about to be written to the memory device into the page buffers, which retain data without power. This ensures that even if power is cut off, the data is preserved and can be written later, thus resolving the contradiction between reducing power consumption and maintaining data integrity.
2Speed
If write data is stored in volatile memory for quick access, then data processing speed is improved, but memory fragmentation occurs and storage space efficiency decreases
Solution Approach 1:
The patent introduces page buffers as an intermediary between volatile memory and the memory device. Write data is first stored in volatile memory for quick access, then selectively backed up to page buffers before being written to the memory device. This intermediary structure allows the system to maintain the speed advantages of volatile memory while preventing fragmentation in the memory device, as the page buffers act as a buffer zone that manages data flow and prevents direct fragmentation in the main storage.
3Reliability
If power supply is maintained to volatile memory during low power mode, then data integrity is maintained, but power consumption increases
Solution Approach 1:
The patent extracts the critical data (write data) from volatile memory and places it into page buffers before cutting off power to volatile memory. By taking out only the necessary data that needs to be preserved and moving it to a different storage location (page buffers) that does not require power to maintain data, the system can safely cut off power to volatile memory, thus reducing power consumption while maintaining data integrity through the extracted and preserved write data.
Data Source
AI summary
Storage devices and methods are disclosed. In an embodiment, a storage device may include a memory device including a plurality of memory units configured to store data and a plurality of page buffers coupled to the plurality of memory units, respectively, a volatile memory configured to store write data requested by a host, a power control device configured to control power supply to the memory device and the volatile memory and a processing circuit configured to control the memory device based on a command transmitted from the host. The processing circuit backs up the write data to a first page buffer among the plurality of page buffers in response to a low power mode entry command transmitted from the host. The power control device cuts off power supply to the volatile memory after the write data is backed up in the first page buffer.