Storage Prefetching Between Non-Volatile and Volatile Memory

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Solution Overview

Problem

Existing storage systems experience varying latencies based on the type of storage medium, leading to inefficiencies in data access and system performance, particularly when accessing non-volatile memory.

Innovation Solution

Implementing a speculative memory read followed by a regular memory read to prefetch data from non-volatile storage to volatile storage, reducing latency by allowing the processor to perform other tasks while waiting for data from non-volatile storage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If data is read directly from non-volatile storage, then data access is performed, but high latency reduces system performance

Engineering Contradiction:
Improvememory access latencyVSAvoidsystem performance
Core Design Contradiction:
Loss of timeVSProductivity

Solution Approach 1:

The system performs preliminary actions by issuing speculative memory read commands to prefetch data from non-volatile storage to volatile storage before the data is actually needed by the processor. This advance data retrieval reduces the latency when the processor subsequently needs the data, as it can be fetched from the faster volatile storage rather than directly from non-volatile storage.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces volatile storage as an intermediary between non-volatile storage and the processor. Data is first transferred from non-volatile storage to volatile storage through speculative prefetching operations, and then the processor accesses the data from volatile storage. This intermediary layer eliminates the need for the processor to directly access slow non-volatile storage, thereby reducing access latency and improving system performance.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Loss of time

If speculative memory read is used to prefetch data, then latency is reduced, but processor executes additional commands

Engineering Contradiction:
Improvedata access latencyVSAvoidcommand processing complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The system implements self-service by having the processor automatically issue speculative memory read commands based on predicted access patterns, without requiring external intervention or complex control logic. The processor serves its own data prefetching needs by autonomously determining which data to prefetch and when, reducing the burden on external memory controllers or management systems.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The speculative memory read mechanism incorporates feedback by monitoring actual data access patterns and adjusting prefetch decisions accordingly. The system learns from previous access behaviors and refines its speculative read commands to prefetch data that is more likely to be needed, reducing wasted prefetch operations and optimizing the balance between latency reduction and command overhead.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12481458B2Systems and methods for prefetching data
Publication Date: 2025.11.25 SAMSUNG ELECTRONICS CO LTD
  • US12481458B2 patent drawing
  • US12481458B2 patent drawing
  • US12481458B2 patent drawing

AI summary

Systems and methods for prefetching data are disclosed. A processor in communication with a storage device identifies a first address. The processor identifies a first setting associated with the first address. The processor issues a first command to a first storage medium of the storage device based on the first setting. The first command is for performing a first type of memory read. The storage device is configured to retrieve first data associated with the first address in the first storage medium, to a second storage medium of the storage device, based on the first command.