Hierarchical Interconnection Network for Storage Processing Units

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Solution Overview

Problem

In data-intensive applications, traditional storage systems face challenges in offloading computational operations due to bandwidth constraints on peer-to-peer communication buses, leading to saturation and impractical data communication between storage processing units.

Innovation Solution

A solid state device system with a hierarchical interconnection network of storage processing units, utilizing various unit network modules such as modified ring and full-mesh topologies, allows direct communication between units without relying on a host system, enabling high throughput and low latency data exchange.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional peer-to-peer communication buses are used for data transfer between storage processing units, then device complexity is reduced, but bandwidth is insufficient leading to saturation and high latency

Engineering Contradiction:
Improvedata transfer throughputVSAvoidinterconnection network complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system segments the interconnection network into multiple communication hubs, each managing a subset of storage processing units. This segmentation allows parallel data transfer paths, increasing overall bandwidth while distributing the communication management load across multiple hubs rather than requiring a single complex centralized controller.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a hierarchical dimension to the interconnection network by organizing storage processing units into groups that communicate through communication hubs. This adds a vertical layer (hub level) above the horizontal unit level, creating multi-dimensional communication paths that increase bandwidth capacity without proportionally increasing overall system complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If computational operations are offloaded to storage processing units, then host system burden is reduced, but I/O bandwidth saturation occurs due to limited communication capacity

Engineering Contradiction:
Improvescientific computation throughputVSAvoiddata communication latency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The communication hubs are pre-configured with routing information and communication paths are established in advance. This preliminary setup allows storage processing units to begin computational operations immediately upon receiving data, without waiting for dynamic routing decisions, thereby reducing communication latency while enabling complex computational tasks to be performed in parallel.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Communication hubs act as intermediaries between storage processing units and the host system, buffering and managing data flow. This intermediary layer absorbs communication variability and allows computational units to operate continuously without being blocked by I/O bandwidth constraints, reducing effective latency for scientific computations.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If a hierarchical interconnection network with multiple communication hubs is implemented, then data communication bandwidth is increased, but device complexity increases

Engineering Contradiction:
Improvedata exchange throughputVSAvoidinterconnection network structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

Each communication hub implements a simplified local interconnection scheme managing only its attached storage processing units, rather than implementing a complex global routing system. This local quality approach allows each hub to operate independently with simple routing logic, increasing overall system bandwidth while keeping individual component complexity low.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The interconnection network is segmented into multiple independent hub units, each handling a subset of communication traffic. This segmentation distributes the complexity burden across multiple simple components rather than requiring a single complex controller, enabling high throughput through parallel operation while maintaining manageable complexity at each segment.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10108377B2Storage processing unit arrays and methods of use
Publication Date: 2018.10.23 WESTERN DIGITAL TECHNOLOGIES INC
  • US10108377B2 patent drawing
  • US10108377B2 patent drawing
  • US10108377B2 patent drawing

AI summary

The embodiments disclosed herein include an interconnection network that is configured to provide data communication between storage processing units. The disclosed interconnection network can be particularly effective when the storage processing units are configured to locally perform scientific computations. The disclosed interconnection network can enable localized, high throughput, and low latency data communication between storage processing units without overloading the host system.