Storage Processor Cache Mirroring with Secondary Memory for Failover

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Solution Overview

Problem

In data storage systems with two storage processors, the failure of one processor leads to data loss and impaired system operation due to the inability to cache data, as the remaining processor cannot write cache data without the mirror cache memory of the failed processor.

Innovation Solution

A secondary cache memory device is introduced to store and mirror write cache data from the remaining processor, ensuring that there are always two copies of the data, allowing the system to continue caching even after the failure of one processor.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If write cache data is stored in cache memories of both storage processors through mirroring, then data reliability is improved, but device complexity increases

Engineering Contradiction:
Improvedata reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A secondary cache memory device is introduced as an intermediary component to receive mirrored write cache data from storage processors. This mediator allows the system to maintain data redundancy without requiring both primary storage processors to remain operational, thereby improving reliability while managing complexity through a dedicated backup component.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements local quality by allowing different cache memory components (primary cache memories in storage processors vs. secondary cache memory device) to serve different functions. The primary caches handle active data processing while the secondary cache provides failover capability, optimizing the system for both performance and reliability in their respective roles.

Inventive Principle:
Principle #3Local quality

2Reliability

If the remaining storage processor writes all write data directly to the disk drive array, then data loss is prevented, but productivity decreases

Engineering Contradiction:
Improvedata loss preventionVSAvoidproductivity
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system performs preliminary action by pre-writing cache data to the secondary cache memory device before potential failure occurs. This advance preparation ensures that data is already in a safe location, eliminating the need for urgent direct writes to disk drives during failure scenarios and maintaining normal processing productivity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses copying by creating a duplicate copy of write cache data in the secondary cache memory device. This copying mechanism allows the system to maintain data availability without requiring immediate direct writes to slow disk drives, thus preserving productivity while ensuring data safety.

Inventive Principle:
Principle #26Copying

3Reliability

If a secondary cache memory device is introduced, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improvesystem reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The secondary cache memory device serves as an intermediary that simplifies the reliability architecture by providing a dedicated failover target. Rather than complex inter-processor communication and data synchronization protocols, the system uses this mediator to automatically receive mirrored data, reducing operational complexity while enhancing reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8688934B1Method for caching data
Publication Date: 2014.04.01 EMC IP HLDG CO LLC
  • US8688934B1 patent drawing
  • US8688934B1 patent drawing
  • US8688934B1 patent drawing

AI summary

A method of caching data includes:A. mirroring data processed by a first storage processor and a second storage processor between a first memory device of the first storage processor and a second memory device of the second storage processor;B. each of the first storage processor and the second storage processor monitoring an availability of the other of the first storage processor and the second storage processor;C. copying data stored in the first memory device to a third memory device and mirroring data processed by the first storage processor between the first memory device and the third memory device when the second storage processor becomes unavailable to the first storage processor; andD. copying data from the first memory device to the second memory device and mirroring data processed by the first storage processor and the second storage processor between the first memory device and the second memory device when the second storage processor becomes available to the first storage processor.