Storage Processor Data Consistency via State Transition

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Solution Overview

Problem

In storage systems with multiple storage processors sharing a disk array, ensuring data consistency across these processors and the shared storage device is challenging, particularly during configuration changes and failovers, which can lead to data inconsistencies.

Innovation Solution

A method and apparatus that manage data consistency by having storage processors switch states to maintain and synchronize configuration information, including receiving requests for configuration information, initiating transactions, and committing changes to the shared storage device, ensuring that both processors and the shared storage device have consistent data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple storage processors share a disk array to improve processing capability and storage efficiency, then system productivity and storage capacity are improved, but data consistency between processors and the shared storage device deteriorates

Engineering Contradiction:
Improveprocessing capabilityVSAvoiddata consistency
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements a feedback mechanism where storage processors continuously monitor and synchronize their configuration information with the shared storage device. When configuration changes occur, the system detects the change and triggers synchronization operations to ensure all processors have consistent data, thereby resolving the data consistency issue while maintaining multi-processor productivity

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent introduces configuration information as an intermediary element that mediates between multiple storage processors and the shared disk array. By centralizing configuration management and using it as a reference point for synchronization, the system ensures that all processors access consistent configuration data, preventing data inconsistency while allowing parallel processing operations

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If configuration information is synchronized between storage processors to maintain data consistency, then reliability is improved, but system complexity increases

Engineering Contradiction:
Improvedata consistencyVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses copying of configuration information from a primary storage processor to secondary processors and the shared storage device. This copying mechanism ensures that all system components have identical configuration data without requiring complex real-time synchronization protocols, thereby maintaining reliability while minimizing system complexity

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent performs preliminary synchronization of configuration information during system initialization and before configuration changes are applied. By pre-establishing consistent configuration data across all processors and the shared storage device, the system avoids the need for complex continuous synchronization mechanisms, reducing overall system complexity while ensuring data consistency

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10101929B2Maintaining data consistency
Publication Date: 2018.10.16 EMC IP HLDG CO LLC
  • US10101929B2 patent drawing
  • US10101929B2 patent drawing
  • US10101929B2 patent drawing

AI summary

Embodiments of the present disclosure provide a method and apparatus of maintaining data consistency by receiving, when a first storage processor is in a Ready state, a request for configuration information of a storage object from a second storage processor; in response to receiving the request, setting the first storage processor to an Updating-Peer state, and sending the configuration information to the second storage processor to maintain consistency of the configuration information in the first and second storage processors; and in response to the configuration information being sent, setting the first storage processor back to the Ready state.