Storage Processor Bandwidth via Dual-Controller Device Interconnect

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional data storage systems have limited bandwidth between storage processor modules due to the constraints of interconnect traces, which restricts data transfer capacity and does not efficiently leverage advancements in storage processor technology.

Innovation Solution

The method involves electrically coupling storage processor modules with an interconnect and a storage device having dual on-device controllers to establish a communications pathway, utilizing dual port capabilities of storage devices to loop back messages and aggregate bandwidth without modifying existing hardware or adding cabling, enabling efficient scalable connections between storage processors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If storage processor modules communicate directly through interconnect traces, then communication path is simple and direct, but bandwidth between storage processors is limited

Engineering Contradiction:
Improvebandwidth between storage processorsVSAvoidcommunication pathway complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces storage devices as intermediary components to establish communication pathways between storage processor modules. Instead of direct SP-to-SP communication through limited interconnect traces, messages are routed through storage devices which act as mediators. The storage devices receive messages from one SP, store them temporarily, and forward to the destination SP, thereby enabling bandwidth aggregation through multiple storage device intermediaries without requiring direct high-speed interconnects between all SP pairs.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent segments the communication pathway into multiple hops through storage devices. Rather than requiring a single direct high-bandwidth connection between SPs, the communication is divided into segments: SP to storage device, storage device to SP, with each segment using existing interconnect traces. This segmentation allows bandwidth aggregation across multiple storage device interfaces, effectively increasing total throughput between SPs.

Inventive Principle:
Principle #1Segmentation

2Productivity

If additional cabling and SP hardware are added to increase bandwidth, then communication bandwidth between SPs increases, but system complexity and cost increase

Engineering Contradiction:
Improvecommunication bandwidth between SPsVSAvoidhardware requirements
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent makes storage devices multi-functional by having them serve both their primary storage function and as communication intermediaries for SP-to-SP messaging. The same storage device interfaces and interconnect traces are used for both data storage operations and communication routing, eliminating the need for separate dedicated hardware for SP communication. This universal use of existing storage device infrastructure enables bandwidth aggregation without additional SP hardware or cabling.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system uses existing storage devices to provide the communication bandwidth service rather than requiring separate dedicated communication infrastructure. The storage devices 'self-serve' by utilizing their existing interfaces and connections to facilitate SP communication, thereby achieving bandwidth aggregation without adding new hardware components or cabling to the system.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12141472B2Providing communication between storage processors through an interconnect and a set of storage devices
Publication Date: 2024.11.12 DELL PROD LP
  • US12141472B2 patent drawing
  • US12141472B2 patent drawing
  • US12141472B2 patent drawing

AI summary

Techniques provide communication between storage processors (SPs) of a storage array. The techniques involve electrically coupling the SPs with an interconnect of the storage array. The techniques further involve electrically coupling a storage device having dual on-device controllers with the interconnect. The techniques further involve establishing a communications pathway between the SPs through the interconnect and the storage device having the dual on-device controllers while the SPs are electrically coupled with the interconnect and while the storage device is electrically coupled with the interconnect.