Storage Controller Data Relocation for Read Collision Avoidance
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Solution Overview
Problem
The read speed of storage controllers varies significantly based on the similarity of physical addresses where data are stored, leading to inefficiencies due to channel, way, and plane collisions, which affect the performance of non-volatile memory devices.
Innovation Solution
A storage controller with a data relocation manager that includes a potential collision counter circuit, preliminary relocation circuit, and flush circuit to relocate data to minimize channel, way, and plane collisions by optimizing data access across non-volatile memory devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data are stored in non-volatile memory devices with similar physical addresses, then storage capacity is efficiently utilized, but read speed decreases due to channel, way, and plane collisions
Solution Approach 1:
The patent applies preliminary action by predicting potential collisions before they occur. The potential collision counter circuit calculates collision probabilities for different data relocation destinations in advance, allowing the system to proactively relocate data to optimal positions before actual read operations happen, thereby preventing channel, way, and plane collisions from degrading read speed
Solution Approach 2:
The patent introduces an intermediary mechanism in the form of a relocation buffer and data relocation manager. This intermediary layer sits between the host device and non-volatile memory devices, intercepting read commands and dynamically relocating data between memory devices to avoid collisions, thus mediating between storage efficiency and read performance
2Productivity
If data are relocated to different non-volatile memory devices to avoid collisions, then read speed improves, but device complexity increases
Solution Approach 1:
The patent implements self-service by enabling the storage system to automatically manage its own data distribution. The potential collision counter circuit continuously monitors access patterns and autonomously determines optimal data relocation without external intervention, while the flush circuit automatically writes relocated data back to memory, making the complex relocation management transparent to the host device
3Productivity
If data are accessed repeatedly in a short period, then data processing efficiency is high, but collision probability increases reducing read speed
Solution Approach 1:
The patent applies preliminary action by detecting repeated access patterns and proactively relocating data before collisions occur. When the potential collision counter detects that the same data are being accessed repeatedly across multiple channels/ways/planes, it preemptively redistributes the data to prevent future collisions, thus maintaining high processing efficiency without time loss from collision-induced delays
Data Source
AI summary
A storage controller configured to control first to N-th non-volatile memory devices respectively including first to N-th plurality of physical addresses is disclosed. The storage controller may comprise a relocation buffer circuit, a potential collision counter circuit configured to store a plurality of potential collision counts respectively corresponding to a plurality of combinations of the first to N-th plurality of physical addresses, a preliminary relocation circuit configured to store a first relocation candidate data which is stored in a first relocation candidate physical address in the relocation buffer circuit, based on a first plurality of potential collision counts, corresponding to the first relocation candidate physical address, among the plurality of potential collision counts, and a flush circuit configured to flush the first relocation candidate data from the relocation buffer circuit to one of the first to N-th non-volatile memory devices.