Computational Storage Request Offloading for Parallel Memory Allocation
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Solution Overview
Problem
Existing computational storage devices face inefficiencies in processing resources due to competing direct and indirect usage requests, leading to delayed processing of indirect requests and underutilization of available resources.
Innovation Solution
A computational storage device architecture that includes an interface, non-volatile memory, storage controller, and computation engine, allowing for efficient handling of direct and indirect requests by prioritizing and offloading computations to different devices, and enabling parallel processing of requests.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If the computational storage device processes both direct and indirect usage requests sequentially, then the processing is simple to manage, but the response time for indirect requests increases and resource utilization decreases
Solution Approach 1:
The patent segments the request processing by identifying and separating indirect usage requests from direct usage requests in the request queue. The computation engine selectively processes indirect requests independently when detected, allowing parallel handling paths that reduce waiting time while maintaining manageable complexity through structured request classification
Solution Approach 2:
The patent implements preliminary detection and identification of indirect usage requests in the request queue before full processing begins. By detecting these requests early and preparing them for accelerated processing, the system reduces the overall response time for indirect requests without disrupting the normal processing flow of direct requests
2Loss of time
If the computational storage device prioritizes indirect usage requests, then the response time for indirect requests improves, but the processing of direct requests may be delayed
Solution Approach 1:
The patent implements dynamic request processing where the computation engine adapts its processing behavior based on the type of request detected. When an indirect usage request is identified, the engine dynamically switches to a prioritized processing mode for that specific request while maintaining the ability to return to normal sequential processing for direct requests, creating a flexible throughput management system
Solution Approach 2:
The patent introduces an intermediary mechanism in the form of a request queue management system that mediates between direct and indirect usage requests. This intermediary structure allows the system to prioritize indirect requests when detected without completely blocking direct request processing, as the intermediary manages the scheduling and timing of request handling to balance both throughput requirements
3Productivity
If the computation engine processes multiple requests in parallel, then the resource utilization improves, but the device complexity increases
Solution Approach 1:
The patent implements a universal computation engine that can handle both direct and indirect usage requests using the same processing resources. Rather than creating separate processing paths or dedicated hardware for different request types, the single computation engine is designed to be multi-functional, processing different request types sequentially or in parallel as needed, thereby improving resource utilization without significantly increasing device complexity
Solution Approach 2:
The patent ensures continuous utilization of the computation engine by maintaining a request queue and systematically processing requests as they become available. The engine transitions smoothly between processing direct and indirect requests without idle time, ensuring that processing resources are continuously engaged. This continuous action approach maximizes resource utilization while maintaining a relatively simple processing architecture through systematic request flow management
Data Source
AI summary
A computational storage device includes an interface exchanging a signal with a first external source, a non-volatile memory device, a storage controller, a device memory, and a computation engine. The interface receives an indirect usage request instructing the computation engine to perform a second computation for second input data from a second external source while performing a first computation for first input data acquired from the first external source. The computation engine provides the first input data and first intermediate data generated when performing the first computation to an external computational storage device in response to the indirect usage request, requests the first computation from the external computational storage device, performs the second computation for the second input data loaded from the non-volatile memory device to the device memory, and outputs second result data generated by completing the second computation to the second external source through the interface.