Storage Access Retry Equalizer Optimization Circuit

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Solution Overview

Problem

Existing data access retry methods from storage media are time-consuming and inefficient, often requiring multiple mechanical repositionings of the head, which can exceed acceptable timeout periods and lead to storage device failure.

Innovation Solution

The implementation of data processing circuits with a multiplexer, memory buffer, and channel setting modification capabilities, allowing for digital processing and retry of failed data access using buffered data sets with adjusted channel settings, such as modified equalizer coefficients and partial response targets, to reduce retry time and increase successful recovery probability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple mechanical repositionings of the head are performed to retry data access, then the probability of successful data recovery is improved, but the access time increases significantly

Engineering Contradiction:
Improvedata recovery probabilityVSAvoidretry time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-buffering the raw data from the storage medium before attempting data detection. When data detection fails, the buffered data is immediately available for retry with different parameters without requiring mechanical repositioning. This pre-positioning of data in the buffer resolves the contradiction by enabling rapid parameter-based retries that maintain high recovery probability while minimizing time loss.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent replaces the mechanical repositioning system with a digital parameter modification system. Instead of mechanically moving the head to retry data access, the system substitutes this with modifying channel settings (equalizer coefficients, partial response targets) and re-processing the buffered data digitally. This substitution eliminates the time-consuming mechanical movement while maintaining the ability to perform multiple retries, thus resolving the contradiction between recovery probability and access time.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If the number of retries is increased to improve data recovery from marginal sectors, then reliability is improved, but the operation duration exceeds acceptable timeout periods

Engineering Contradiction:
Improvedata access reliabilityVSAvoidretry operation duration
Core Design Contradiction:
ReliabilityVSDuration of action of moving object

Solution Approach 1:

The patent pre-positions the data in a buffer during the initial read operation, making it immediately available for multiple retry attempts. This preliminary buffering action allows the system to perform numerous retries with different channel parameters without the overhead of repeated mechanical access operations, thereby increasing reliability while keeping the total operation duration within acceptable timeout periods.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements dynamics by making the channel parameters (equalizer coefficients, partial response targets) variable and adaptable during the retry process. The system dynamically adjusts these parameters based on the detection of read errors and the characteristics of the buffered data, allowing for optimized retry attempts that improve reliability without extending operation duration excessively.

Inventive Principle:
Principle #15Dynamics

3Measurement precision

If channel settings are modified to optimize data detection for marginal sectors, then detection precision is improved, but the complexity of the data processing system increases

Engineering Contradiction:
Improvedata detection precisionVSAvoiddata processing circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies parameter changes by modifying channel settings (equalizer coefficients, partial response targets) to optimize data detection for marginal sectors. By adjusting these parameters based on the detected read errors and data characteristics, the system improves detection precision. The parameter changes are implemented through programmable circuitry that can adaptively modify detection parameters without fundamentally increasing system complexity.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent implements feedback by using the results of data detection to inform subsequent parameter adjustments. When detection failures are identified, the system feeds this information back to modify the channel settings for the next retry attempt. This feedback mechanism enables the system to progressively optimize detection precision for marginal sectors while maintaining manageable complexity through iterative refinement rather than complex upfront design.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS7948699B2Systems and methods for equalizer optimization in a storage access retry
Publication Date: 2011.05.24 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US7948699B2 patent drawing
  • US7948699B2 patent drawing
  • US7948699B2 patent drawing

AI summary

Various embodiments of the present invention provide data processing circuits that include a multiplexer, a memory buffer, a data processing circuit, and a channel setting modification circuit. A first input of the multiplexer receives an input data set and a second input of the multiplexer receives a buffered data set. The multiplexer provides either the input data set or the buffered data set as a multiplexer output based upon a select signal. The memory buffer receives the multiplexer output and provides the buffered data set. Operation of the data processing circuit is at least in part governed by channel settings. The data processing circuit receives the multiplexer output and performs a data detection process. The select signal is asserted to select the buffered data set when the data detection process fails, and is asserted to select the input data set when the data detection process succeeds. The channel setting modification circuit is operable to modify the channel settings when the data detection process fails.