Solid-State Storage State Detection for LDPC Decoding Accuracy

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing error correction technologies, such as BCH coding, are insufficient in providing adequate correction capability for non-volatile memory as manufacturing technologies improve, leading to increased error probability and reduced reliability in solid state storage devices.

Innovation Solution

A method is introduced that applies multiple sensing voltages to non-volatile memory units to define storing states, calculating strong correct and error ratios, and generating log-likelihood ratios to improve data bit value decoding accuracy, thereby enhancing error correction capabilities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If BCH coding technology is used for error correction, then fast computation is achieved, but correction capability becomes insufficient as manufacturing technologies improve

Engineering Contradiction:
Improvecomputation speedVSAvoiderror correction capability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent transitions from BCH coding to LDPC coding, changing the fundamental error correction algorithm parameters. LDPC codes provide stronger correction capability for modern high-capacity non-volatile memories while maintaining computational efficiency through iterative decoding processes.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If non-volatile memory undergoes multiple erasing and writing operations, then storage capacity is utilized, but error probability increases and reliability decreases

Engineering Contradiction:
Improvestorage utilizationVSAvoiderror probability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies error correction coding (LDPC) in advance during the writing process and performs preliminary error detection and correction during reading operations. This preliminary action prevents error accumulation from multiple erase-write cycles, maintaining reliability even as storage capacity is fully utilized.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If sensing voltages are applied to define storing states, then data bit value decoding accuracy is improved, but device complexity increases

Engineering Contradiction:
Improvedecoding accuracyVSAvoidsensing voltage application complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the threshold voltage distribution into multiple regions (strong correct region, weak correct region, strong error region, weak error region) by applying multiple sensing voltages. This segmentation enables more precise decoding by treating different threshold voltage ranges differently, improving accuracy while managing complexity through systematic region classification.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10573393B1Method for detecting storing states of solid state storage device
Publication Date: 2020.02.25 STORART TECHSHENZHEN CO LTD
  • US10573393B1 patent drawing
  • US10573393B1 patent drawing
  • US10573393B1 patent drawing

AI summary

A method for detecting storing states of a solid state storage device is provided, including steps of: applying sensing voltages to memory units; comparing threshold voltages of the memory units with the sensing voltages and accordingly to define the storing states including a strong correct region, a weak correct region, a strong error region and a weak error region, in which the memory units are classified; calculating the number of the memory units in the storing states; calculating a strong correct ratio of the number of the memory units in the strong correct region to the number of the memory units in the strong and weak correct regions; calculating a strong error ratio of the number of the memory units in the strong error region to the number of the memory units in the strong and weak error regions; and generating a log-likelihood ratio based on said ratios.