Storage Device Voltage Rising Time Control
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Solution Overview
Problem
Current storage devices face challenges in efficiently calculating and managing the voltage rising time, which affects the operating performance and stability of memory cells, particularly in flash memory devices, leading to variations in data storage and retrieval times.
Innovation Solution
A storage device and method that include a memory cell array, a voltage generator, and a control logic to increase the power supply voltage to a reference level, with a status information determining unit and device voltage control unit to set the operating voltage based on the voltage rising time, allowing for precise control of the clock cycle and pump clock to optimize voltage generation and storage operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the voltage generator increases the power supply voltage quickly to reach the reference voltage, then the productivity is improved, but the reliability deteriorates due to voltage instability affecting memory cell operations
Solution Approach 1:
The voltage generator increases voltage in periodic steps rather than continuously, allowing stabilization at each voltage level before proceeding to the next higher level. This periodic voltage adjustment ensures that memory cells have sufficient time to stabilize at each voltage stage, preventing operations during transient voltage states while maintaining overall productivity.
Solution Approach 2:
The system performs preliminary voltage increase to a first voltage level before proceeding to the second voltage level. This staged approach allows the system to prepare memory cells for higher voltage operations gradually, ensuring that all cells are properly charged and stabilized before critical read operations begin, thus improving reliability without sacrificing too much time.
2Reliability
If the system waits for complete voltage stabilization before performing read operations, then the reliability is improved, but the loss of time increases
Solution Approach 1:
The system performs a partial voltage increase to a first voltage level that is sufficient for read operations but less than the full second voltage level. This partial action allows read operations to proceed earlier than if complete voltage stabilization were required, reducing time loss while maintaining reliability for read-specific operations.
Solution Approach 2:
The voltage increase process is segmented into at least two distinct voltage levels: a first voltage level sufficient for read operations and a second voltage level for full memory operations. This segmentation allows the system to perform read operations at the lower voltage level without waiting for complete stabilization at the higher level, thereby reducing time loss while maintaining operational reliability.
3Reliability
If the clock cycle is extended to allow voltage stabilization, then the reliability is improved, but the productivity deteriorates
Solution Approach 1:
The clock cycle is dynamically adjusted based on the voltage level and operational requirements. During voltage transitions, the clock cycle is extended to allow stabilization. Once stabilization is achieved, the clock cycle returns to normal speed. This dynamic adjustment ensures reliability during critical transitions while maintaining high productivity during stable operational phases.
Solution Approach 2:
The system employs periodic clock cycle extensions that coincide with voltage transition periods. Rather than maintaining extended clock cycles continuously, the system periodically slows the clock only when voltage changes occur, allowing memory cells to stabilize during these brief periods while maintaining high-speed operations during stable voltage states, thus balancing reliability and productivity.
Data Source
AI summary
The present disclosure relates to method of operating a memory device, the memory device includes a memory cell array, a voltage generator, and control logic. The voltage generator configured to increase a power supply voltage. The control logic is configured to store a time based on the increased power supply voltage and a reference voltage. The reference voltage is a voltage level used to perform an operation on the memory cell array.