Store Buffer Cache Information Reuse
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Solution Overview
Problem
Store buffers in data processing apparatuses consume high power, particularly in low-power applications, due to frequent cache lookups and bandwidth usage, which reduces battery life and performance.
Innovation Solution
A store buffer with reception logic, buffer logic, and entry selection logic that selectively allocates entries based on request information and cache information, reducing the need for cache lookups by maintaining and reusing cache information, thereby minimizing power consumption and bandwidth usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If cache lookups are performed for each write request to determine cache line allocation, then accurate cache information is obtained, but power consumption increases and cache bandwidth is consumed
Solution Approach 1:
The store buffer performs cache lookups in advance to obtain cache line allocation information before write requests arrive. This pre-obtained cache information is stored and reused for subsequent write requests to the same cache lines, eliminating the need for repeated lookups and reducing power consumption while maintaining accurate cache information
Solution Approach 2:
Instead of performing repeated cache lookups for each write request, the system copies and stores cache information (cache line allocation status) in the store buffer after the first lookup. Subsequent write requests reuse this copied information, avoiding redundant lookups and reducing both power consumption and cache bandwidth usage
2Productivity
If store buffer entries are cleared as soon as requests are completed, then entries are available for new requests, but cache lookups must be performed for each new request
Solution Approach 1:
The store buffer maintains cache information continuously even after write requests are completed. Rather than clearing entries immediately, the buffer retains valid cache information (cache line allocation status) and reuses it for subsequent requests, ensuring continuous availability of accurate cache information without requiring repeated lookups
Solution Approach 2:
The system selectively clears only the data value from completed requests while recovering and retaining the cache information (cache line allocation status) in the store buffer entries. This allows the cache information to be reused for future requests to the same cache lines, reducing power consumption while maintaining entry availability
3Device complexity
If the number of store buffer entries is kept low, then complexity and chip area are reduced, but processor stalling occurs when entries are full
Solution Approach 1:
Each store buffer entry is designed to handle multiple write requests to the same cache line by retaining cache information. A single entry can serve multiple requests sequentially, effectively increasing the buffer's capacity without adding more physical entries, thus reducing complexity while preventing processor stalling
Data Source
AI summary
A store buffer, method and data processing apparatus is disclosed. The store buffer comprises: reception logic operable to receive a request to write a data value to an address in memory; buffer logic having a plurality of entries, each entry being selectively operable to store request information indicative of a previous request and to maintain associated cache information indicating whether a cache line in a cache is currently allocated for writing data values to an address associated with that request; and entry selection logic operable to determine which one of the plurality entries to allocate to store the request using the request information and the associated cache information of the plurality of entries to determine whether a cache line in the cache is currently allocated for writing the data value to the address in memory. By reviewing the entries in the buffer logic and identifying which entry to store the request based on information currently stored by the buffer logic, the need to obtain cache information indicating whether any cache line in a cache is currently allocated for writing the data value may be obviated. In turn, the need to perform a cache look up to obtain the cache information may also be obviated. It will be appreciated that by obviating the need to perform a cache lookup, the power consumption of the store buffer may be reduced. Also, the amount of cache bandwidth consumed by performing unnecessary cache lookups may also be reduced, thereby significantly improving the performance of the cache.