Store Buffer Size Field Encoding for Write Merging
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Solution Overview
Problem
Existing processing systems face inefficiencies in merging store instructions due to the lack of effective pattern detection and storage mechanisms, leading to increased memory transactions and circuit area requirements.
Innovation Solution
The implementation of buffer circuitry that determines and stores write merging information, such as patterns, within the size field of each entry in the store buffer, allowing for efficient merging of store instructions based on address relationships.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If store instructions are merged based on address comparison, then transaction efficiency is improved, but circuit area increases due to lack of pattern detection
Solution Approach 1:
The patent uses a compact copy of write merging information stored in the size field rather than full pattern detection logic. The size field captures essential merging patterns (consecutive, strided, interleaved) in a compressed form, allowing the system to benefit from pattern-based merging without implementing complete pattern detection circuitry throughout the buffer.
Solution Approach 2:
The patent changes the parameter representation by encoding write merging information directly in the size field of buffer entries. Instead of using separate pattern detection circuits, the system modifies the existing size field to contain encoded pattern information (e.g., indicating consecutive addresses, strided patterns, or interleaved sequences), thereby achieving pattern-based merging with minimal additional circuitry.
2Measurement precision
If write mask of each entry is captured for merging, then merging accuracy is improved, but storage requirements increase
Solution Approach 1:
The patent extracts only the essential write merging information needed for merging decisions and stores it in the size field, rather than capturing and storing the complete write mask for each entry. This extraction approach maintains sufficient merging accuracy by capturing pattern identifiers while removing redundant storage requirements.
Solution Approach 2:
Instead of using the write mask to determine merging patterns, the patent inverts the approach by encoding pattern information in the size field, which then guides the merging process. This inversion allows the system to achieve accurate merging with minimal storage by using the size field as a pattern indicator rather than a data container.
3Loss of substance
If pattern detection is implemented, then data storage during merging is reduced, but device complexity increases
Solution Approach 1:
The patent makes the size field multi-functional by using it both for its original purpose (storing size information) and for encoding write merging patterns. This universal use of the existing size field allows pattern detection capabilities to be added without increasing device complexity, as no separate storage structure is required.
Solution Approach 2:
The size field serves itself by containing encoded pattern information that enables automatic merging decisions. The buffer entry's own size field provides the pattern detection capability needed for its merging, eliminating the need for external pattern detection circuits and reducing overall device complexity.
Data Source
AI summary
Merging store instructions for a memory includes receiving a first store instruction having a first address, and determining a first pattern based on a comparison of the first address and a second address of an entry within a buffer. Further, a size field of the entry is updated based on the first pattern. The first address of the first store instruction is merged with the second address within the entry to generate a merged instruction. The merged store instruction is communicated to the memory.