Store Queue CAM Tracking for L1 Data Cache Directory Changes
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Solution Overview
Problem
Current Level 1 data cache directory designs in processors result in substantial time windows and require an extra copy, leading to area inefficiencies due to the need for maintaining directory changes.
Innovation Solution
A Store Queue (STQU) design with a Content Addressable Memory (CAM)-based store address tracking mechanism that includes early and late write CAM ports, allowing data to be written to a new address only after a prescribed delay, eliminating the need for an extra L1 data cache directory and reducing time windows.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an extra copy of the L1 DCache directory is maintained to avoid losing data due to changes in directory allocation, then data reliability is improved, but the area occupied in the L1 DCache increases significantly
Solution Approach 1:
The patent extracts the directory change tracking function from the L1 DCache directory structure itself and places it in the Store Queue. By using a CAM-based store address tracking mechanism in the STQU, the system can monitor directory allocations without requiring an extra directory copy in the L1 cache, thus resolving the area overhead while maintaining data reliability
Solution Approach 2:
The Store Queue acts as an intermediary between the L1 DCache and the directory tracking mechanism. The CAM-based store address tracking in the STQU monitors directory changes and provides early/late write ports to update the directory, eliminating the need for an extra directory copy while ensuring data integrity during directory allocations
2Measurement precision
If the L1 DCache directory uses a design with 32 entries×16 way associative×50 bits, then the directory can track all cache lines, but substantial time windows are created requiring an extra directory copy
Solution Approach 1:
The CAM-based store address tracking mechanism in the Store Queue performs preliminary tracking of directory allocations before they occur in the L1 cache. The early write port updates the directory in advance, eliminating the time window that would otherwise require an extra directory copy to prevent data loss during allocation transitions
Data Source
AI summary
Method, system and computer program product for tracking changes in an L1 data cache directory. A method for tracking changes in an L1 data cache directory determines if data to be written to the L1 data cache is to be written to an address to be changed from an old address to a new address. If it is determined that the data to be written is to be written to an address to be changed, a determination is made if the data to be written is associated with the old address or the new address. If it is determined that the data is to be written to the new address, the data is allowed to be written to the new address following a prescribed delay after the address to be changed is changed. The method is preferably implemented in a system that provides a Store Queue (STQU) design that includes a Content Addressable Memory (CAM)-based store address tracking mechanism that includes early and late write CAM ports. The method eliminates time windows and the need for an extra copy of the L1 data cache directory.