Store Queue Store-Mark Forward Progress Guarantee
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Solution Overview
Problem
The disparity between microprocessor clock speeds and memory access speeds leads to performance issues, as existing store queue designs struggle to ensure forward progress for threads when merging non-consecutive stores without violating memory models like Total-Store-Order (TSO).
Innovation Solution
A system that forces a thread to release a store-mark on a cache line by sending a forward-progress-read-to-own (FPRTO) if it holds the mark, allowing another thread to acquire the mark and ensuring forward progress, while maintaining store-marks and program-order FIFOs to manage store queue entries and cache line records.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If non-consecutive stores directed to the same dataword are merged in the store queue, then memory bandwidth is reduced and performance is improved, but the Total-Store-Order (TSO) memory model is violated due to reordering of stores with respect to intervening memory accesses
Solution Approach 1:
The patent introduces store-marks as intermediary indicators on cache lines to mediate between store merging and memory model correctness. When a store-mark is present on a cache line, it signals that stores to that cache line can be merged without violating TSO, as the store-mark acts as a barrier that prevents other threads from accessing the cache line until the merge is complete. This allows non-consecutive stores to be merged while maintaining apparent program order for other threads.
2Productivity
If store-marking is used to enable merging of non-consecutive stores, then store merging is achieved, but forward progress for threads cannot be guaranteed when multiple threads are store-marking cache lines
Solution Approach 1:
The patent applies preliminary action by having threads acquire store-marks on cache lines before performing stores, and by establishing a mechanism where threads can force the release of store-marks held by other threads. This preliminary acquisition and the forced release mechanism ensure that threads will eventually be able to proceed with their stores without indefinite blocking, guaranteeing forward progress while maintaining the ability to merge stores.
3Productivity
If consecutive stores to the same dataword are merged into a single store queue entry, then the number of memory accesses is reduced, but non-consecutive stores cannot be merged without violating TSO
Solution Approach 1:
The patent applies local quality by making the merging capability dependent on the local state of the cache line, specifically the presence or absence of a store-mark. When a store-mark is present on a cache line, the system locally permits merging of non-consecutive stores to that cache line. When no store-mark is present, merging is restricted to consecutive stores only. This local quality control allows flexible merging adaptability while maintaining TSO correctness.
Data Source
AI summary
Some embodiments of the present invention provide a system that performs stores in a memory system. During operation, the system performs a store for a first thread, which involves creating an entry for the store in a store queue for the first thread. It also involves attempting to store-mark a corresponding cache line for the first thread by sending a store-mark request for the first thread to the memory system, wherein a store-mark on the cache line indicates that one or more store queue entries are waiting to be committed to the cache line. If the attempt to store-mark the cache line fails because a second thread holds a store-mark on the cache line, and if obtaining the store-mark will ensure forward progress for the first thread, the system forces the second thread to release the store-mark, so the first thread can acquire a store-mark for the cache line.