Store Queue Sync-ID for Concurrent Retirement

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Solution Overview

Problem

Existing out-of-order store queues (OoO STQs) in processors face data integrity issues due to store ordering hazards and lack scalability, leading to increased area and power costs, especially when handling large numbers of concurrent synchronizing operations.

Innovation Solution

The processor architecture modifies the store queue to process multiple synchronized groups by assigning a synchronized identification (SID) to each entry, using a SIDR counter and ATS/ATSR bits to track and retire entries efficiently, allowing for concurrent retirement of thread-sync, all-thread-sync, and regular stores without waiting for older entries.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If dependency vectors are used to fully and concurrently handle multiple synchronizing operations within an OoO STQ, then data integrity is improved, but area and power costs increase significantly

Engineering Contradiction:

Improvedata integrityVSAvoidarea and power costs

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the synchronization tracking into individual bits per entry (sync bit, all-thread-sync bit, ATS allocation bit, ATS retirement bit) rather than using comprehensive dependency vectors. Each bit independently tracks a specific synchronization aspect, dividing the complex dependency tracking problem into manageable binary states that require minimal hardware resources while maintaining data integrity.

Inventive Principle:

Principle #1Segmentation

2Productivity

If the STQ size is increased to handle larger concurrent operations, then productivity is improved, but area costs and power consumption increase

Engineering Contradiction:

Improveconcurrent operation handling capacityVSAvoidSTQ area and power costs

Core Design Contradiction:

ProductivityVSArea of stationary object

Solution Approach 1:

The patent implements self-service synchronization tracking where each STQ entry autonomously maintains its own sync bits and ATS bits that automatically indicate when the entry is synchronized and ready for retirement. The SIDR counter automatically increments when entries retire, eliminating the need for complex external dependency vector management and enabling the STQ to scale efficiently without proportionally increasing control hardware area or power consumption.

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS8930680B2Sync-ID for multiple concurrent sync dependencies in an out-of-order store queue

Publication Date: 2015.01.06 INTERNATIONAL BUSINESS MACHINE CORPORATION

AI summary

A method, system and process for retiring data entries held within a store queue (STQ). The STQ of a processor cache is modified to receive and process multiple synchronized groups (sync-groups). Sync groups comprise thread of execution synchronized (thread-sync) entries, all thread of execution synchronized (all-thread-sync) entries, and regular store entries (non-thread-sync and non-all-thread-sync). The task of storing data entries, from the STQ out to memory or an input/output device, is modified to increase the effectiveness of the cache. Sync-groups are created for each thread and tracked within the STQ via a synchronized identification (SID). An entry is eligible for retirement when the entry is within a currently retiring sync-group as identified by the SID.