Store-to-load forwarding from interlocking stores
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional high-performance processors face performance degradation due to the need for loads to stall when encountering interlocking stores, as existing store-to-load forwarding mechanisms require exact address and size matches, leading to potential partial overlaps and failed executions.
Innovation Solution
The enhanced load/store unit (LSU) allows store-to-load forwarding from interlocking stores by determining if all or only a portion of the data bytes needed by the load can be provided by the interlocking store, using a store data buffer for partial matches and the data cache for remaining bytes, thereby enabling execution without stalling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional store-to-load forwarding is used with exact address and size matches, then forwarding accuracy is maintained, but load execution stalls when encountering interlocking stores with partial overlaps
Solution Approach 1:
The patent segments the load data into multiple bytes and processes each byte independently. When a load interlocks with a store, the forwarding mechanism divides the load bytes into two groups: those that can be forwarded from the store (matching bytes) and those that cannot (non-matching bytes). This segmentation allows partial forwarding to proceed without stalling the entire load operation, thereby improving throughput while maintaining forwarding accuracy for valid bytes.
Solution Approach 2:
The patent applies partial action by allowing the load to proceed with only the portion of data that can be forwarded from the interlocking store, rather than requiring complete forwarding of all bytes. The load execution is divided into partial forwarding (from store) and partial non-forwarding (from cache), enabling the operation to continue without full stalling while maintaining correctness for the forwarded portion.
2Reliability
If loads stall until interlocking stores are written to memory, then data correctness is ensured, but processor performance degrades
Solution Approach 1:
The patent performs preliminary action by checking address and size overlaps between loads and interlocking stores before executing the load. The forwarding mechanism pre-identifies which bytes can be safely forwarded from the store buffer without waiting for the store to complete memory writes. This preliminary validation ensures data correctness while enabling the load to proceed immediately with forwarded bytes, eliminating the need to stall until memory writes complete.
3Productivity
If store-to-load forwarding is extended to interlocking stores with partial overlaps, then load execution continues without stalling, but forwarding logic complexity increases
Solution Approach 1:
The patent reduces forwarding logic complexity by segmenting the forwarding decision into simple byte-level comparisons. Instead of complex analysis of partial overlaps, the mechanism checks each load byte against the store address and size to determine if it falls within the store range. This segmented approach transforms a complex partial overlap problem into multiple simple inclusion checks, making the logic more manageable and implementable.
Solution Approach 2:
The patent applies local quality by treating each byte of the load independently with respect to forwarding decisions. Rather than making a single binary forwarding decision for the entire load, the mechanism applies different quality (forwarding or non-forwarding) to different bytes based on their individual address matching with the store. This local differentiation simplifies the overall logic by allowing independent evaluation of each byte without complex inter-byte dependencies.
Data Source
AI summary
A method and a processor load/store unit (LSU) are described for performing store-to-load forwarding (STLF) from an interlocking store. STLF is performed when a starting address of the store and the load do not match, or when a data size of the store is smaller than a data size of the load. The LSU detects a load that interlocks with a store, and determines whether all or only a portion of data bytes needed by the load can be provided by the interlocking store. If it is determined that only a portion of the data bytes needed by the load can be provided by the interlocking store, then that portion of the data bytes is provided by a store data buffer (SDB) and the remaining portion of the data bytes needed by the load is provided by a data cache (DC). Otherwise, the SDB provides all of the data bytes.